Unverified Commit 96c1e1c4 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!6069 RDMA/hns: support roh 

Merge Pull Request from: @chenke1978 
 
hns roce support roh:
RDMA/hns: Add new device ID
RDMA/hns: Support for ROH
RDMA/hns: Support RDMA_CM in ROH mode

https://gitee.com/openeuler/kernel/issues/I9GCD4 
 
Link:https://gitee.com/openeuler/kernel/pulls/6069

 

Reviewed-by: default avatarChengchang Tang <tangchengchang@huawei.com>
Reviewed-by: default avatarYue Haibing <yuehaibing@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parents 2ce949a8 c7e9cb87

drivers/infiniband/hw/hns/hns_roce_device.h

+1 −0
Original line number Diff line number Diff line
@@ -1108,6 +1108,7 @@ struct hns_roce_dev { 
	struct hns_roce_hem_table  gmv_table;



	int			cmd_mod;

	u8			mac_type;

	int			loop_idc;

	u32			sdb_offset;

	u32			odb_offset;

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+25 −0
Original line number Diff line number Diff line
@@ -543,6 +543,7 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp, 
			     void *wqe, unsigned int *sge_idx,

			     unsigned int owner_bit)

{

	struct hns_roce_dev *hr_dev = to_hr_dev(qp->ibqp.device);

	struct hns_roce_ah *ah = to_hr_ah(ud_wr(wr)->ah);

	struct hns_roce_v2_ud_send_wqe *ud_sq_wqe = wqe;

	unsigned int curr_idx = *sge_idx;
@@ -576,6 +577,9 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp, 
	if (ret)

		return ret;



	if (hr_dev->mac_type == HNAE3_MAC_ROH && qp->ibqp.qp_type == IB_QPT_GSI)

		ud_sq_wqe->dmac[0] = 0xF0;



	qp->sl = to_hr_ah(ud_wr(wr)->ah)->av.sl;



	set_extend_sge(qp, wr->sg_list, &curr_idx, valid_num_sge);
@@ -3377,6 +3381,8 @@ static int hns_roce_v2_set_gid(struct hns_roce_dev *hr_dev, int gid_index, 
			else

				sgid_type = GID_TYPE_FLAG_ROCE_V2_IPV6;

		} else if (attr->gid_type == IB_GID_TYPE_ROCE) {

			if (hr_dev->mac_type == HNAE3_MAC_ROH)

				return -EPERM;

			sgid_type = GID_TYPE_FLAG_ROCE_V1;

		}

	}
@@ -7180,12 +7186,27 @@ static const struct pci_device_id hns_roce_hw_v2_pci_tbl[] = { 
	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_200G_RDMA), 0},

	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF),

	 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},



	{ PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_ROH), 0 },

	{ PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_200G_ROH), 0 },

	{ PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_400G_ROH), 0 },



	/* required last entry */

	{0, }

};



MODULE_DEVICE_TABLE(pci, hns_roce_hw_v2_pci_tbl);



static const struct pci_device_id hns_roh_pci_tbl[] = {

	{ PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_ROH), 0 },

	{ PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_200G_ROH), 0 },

	{ PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_400G_ROH), 0 },



	/* required last entry */

	{0, }

};

MODULE_DEVICE_TABLE(pci, hns_roh_pci_tbl);



static void hns_roce_hw_v2_get_cfg(struct hns_roce_dev *hr_dev,

				  struct hnae3_handle *handle)

{
@@ -7215,6 +7236,10 @@ static void hns_roce_hw_v2_get_cfg(struct hns_roce_dev *hr_dev, 
		hr_dev->irq[i] = pci_irq_vector(handle->pdev,

						i + handle->rinfo.base_vector);



	id = pci_match_id(hns_roh_pci_tbl, hr_dev->pci_dev);

	if (id)

		hr_dev->mac_type = HNAE3_MAC_ROH;



	/* cmd issue mode: 0 is poll, 1 is event */

	hr_dev->cmd_mod = 1;

	hr_dev->loop_idc = 0;

drivers/infiniband/hw/hns/hns_roce_main.c

+8 −3
Original line number Diff line number Diff line
@@ -731,9 +731,14 @@ static int hns_roce_port_immutable(struct ib_device *ib_dev, u32 port_num, 
	immutable->gid_tbl_len = attr.gid_tbl_len;



	immutable->max_mad_size = IB_MGMT_MAD_SIZE;



	if (to_hr_dev(ib_dev)->mac_type == HNAE3_MAC_ROH)

		immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;

	else if (to_hr_dev(ib_dev)->caps.flags & HNS_ROCE_CAP_FLAG_ROCE_V1_V2)

		immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |

					    RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;

	else

		immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;

	if (to_hr_dev(ib_dev)->caps.flags & HNS_ROCE_CAP_FLAG_ROCE_V1_V2)

		immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;



	return 0;

}