Commit 95997723 authored by Marek Behún's avatar Marek Behún Committed by Lorenzo Pieralisi
Browse files

PCI: aardvark: Read all 16-bits from PCIE_MSI_PAYLOAD_REG 

The PCIE_MSI_PAYLOAD_REG contains 16-bit MSI number, not only lower
8 bits. Fix reading content of this register and add a comment
describing the access to this register.

Link: https://lore.kernel.org/r/20211028185659.20329-4-kabel@kernel.org


Fixes: 8c39d710 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
parent e4313be1

drivers/pci/controller/pci-aardvark.c

+6 −1
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ 
#define PCIE_MSI_STATUS_REG			(CONTROL_BASE_ADDR + 0x58)

#define PCIE_MSI_MASK_REG			(CONTROL_BASE_ADDR + 0x5C)

#define PCIE_MSI_PAYLOAD_REG			(CONTROL_BASE_ADDR + 0x9C)

#define     PCIE_MSI_DATA_MASK			GENMASK(15, 0)



/* PCIe window configuration */

#define OB_WIN_BASE_ADDR			0x4c00
@@ -1319,8 +1320,12 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie) 
		if (!(BIT(msi_idx) & msi_status))

			continue;



		/*

		 * msi_idx contains bits [4:0] of the msi_data and msi_data

		 * contains 16bit MSI interrupt number

		 */

		advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);

		msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF;

		msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK;

		generic_handle_irq(msi_data);

	}