Commit 95275402 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2021-04-30' of git://anongit.freedesktop.org/drm/drm 

Pull more drm updates from Dave Airlie:
 "Looks like I missed a tegra feature request for next, but should still
  be fine since it's pretty self contained.

  Apart from that got a set of i915 and amdgpu fixes as per usual along
  with a few misc fixes.

  tegra:
   - Tegra186 hardware cursor support
   - better capability reporting for different SoC
   - better framebuffer modifier support
   - host1x fixes

  ttm:
   - fix unswappable BO handling

  efifb:
   - check for PCI before using it

  amdgpu:
   - Fixes for Aldebaran
   - Display LTTPR fixes
   - eDP fixes
   - Fixes for Vangogh
   - RAS fixes
   - ASPM support
   - Renoir SMU fixes
   - Modifier fixes
   - Misc code cleanups
   - Freesync fixes

  i915:
   - Several fixes to GLK handling in recent display refactoring
   - Rare watchdog timer race fix
   - Cppcheck redundant condition fix
   - Overlay error code propagation fix
   - Documentation fix
   - gvt: Remove one unused function warning
   - gvt: Fix intel_gvt_init_device() return type
   - gvt: Remove one duplicated register accessible check"

* tag 'drm-next-2021-04-30' of git://anongit.freedesktop.org/drm/drm: (111 commits)
  efifb: Check efifb_pci_dev before using it
  drm/i915: Fix docbook descriptions for i915_gem_shrinker
  drm/i915: fix an error code in intel_overlay_do_put_image()
  drm/i915/display/psr: Fix cppcheck warnings
  drm/i915: Disable LTTPR detection on GLK once again
  drm/i915: Restore lost glk ccs w/a
  drm/i915: Restore lost glk FBC 16bpp w/a
  drm/i915: Take request reference before arming the watchdog timer
  drm/ttm: fix error handling if no BO can be swapped out v4
  drm/i915/gvt: Remove duplicated register accessible check
  drm/amdgpu/gmc9: remove dummy read workaround for newer chips
  drm/amdgpu: Add mem sync flag for IB allocated by SA
  drm/amdgpu: Fix SDMA RAS error reporting on Aldebaran
  drm/amdgpu: Reset RAS error count and status regs
  Revert "drm/amdgpu: workaround the TMR MC address issue (v2)"
  drm/amd/display: 3.2.132
  drm/amd/display: [FW Promotion] Release 0.0.62
  drm/amd/display: add helper for enabling mst stream features
  drm/amd/display: Report Proper Quantization Range in AVI Infoframe
  drm/amd/display: Fix call to pass bpp in 16ths of a bit
  ...
parents 65c61de9 1cd6b4a0

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

+0 −4
Original line number Diff line number Diff line
@@ -234,14 +234,10 @@ uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *s 
	})



/* GPUVM API */

int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, u32 pasid,

					void **vm, void **process_info,

					struct dma_fence **ef);

int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd,

					struct file *filp, u32 pasid,

					void **vm, void **process_info,

					struct dma_fence **ef);

void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm);

void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm);

uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm);

int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+5 −58
Original line number Diff line number Diff line
@@ -445,20 +445,17 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem) 
			mapping_flags |= AMDGPU_VM_MTYPE_UC;

		} else if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {

			if (bo_adev == adev) {

				mapping_flags |= AMDGPU_VM_MTYPE_RW;

				mapping_flags |= coherent ?

					AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;

				if (adev->gmc.xgmi.connected_to_cpu)

					snoop = true;

			} else {

				mapping_flags |= AMDGPU_VM_MTYPE_NC;

				mapping_flags |= AMDGPU_VM_MTYPE_UC;

				if (amdgpu_xgmi_same_hive(adev, bo_adev))

					snoop = true;

			}

		} else {

			snoop = true;

			if (adev->gmc.xgmi.connected_to_cpu)

				/* system memory uses NC on A+A */

				mapping_flags |= AMDGPU_VM_MTYPE_NC;

			else

			mapping_flags |= coherent ?

				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;

		}
@@ -1037,41 +1034,6 @@ static int init_kfd_vm(struct amdgpu_vm *vm, void **process_info, 
	return ret;

}



int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, u32 pasid,

					  void **vm, void **process_info,

					  struct dma_fence **ef)

{

	struct amdgpu_device *adev = get_amdgpu_device(kgd);

	struct amdgpu_vm *new_vm;

	int ret;



	new_vm = kzalloc(sizeof(*new_vm), GFP_KERNEL);

	if (!new_vm)

		return -ENOMEM;



	/* Initialize AMDGPU part of the VM */

	ret = amdgpu_vm_init(adev, new_vm, AMDGPU_VM_CONTEXT_COMPUTE, pasid);

	if (ret) {

		pr_err("Failed init vm ret %d\n", ret);

		goto amdgpu_vm_init_fail;

	}



	/* Initialize KFD part of the VM and process info */

	ret = init_kfd_vm(new_vm, process_info, ef);

	if (ret)

		goto init_kfd_vm_fail;



	*vm = (void *) new_vm;



	return 0;



init_kfd_vm_fail:

	amdgpu_vm_fini(adev, new_vm);

amdgpu_vm_init_fail:

	kfree(new_vm);

	return ret;

}



int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd,

					   struct file *filp, u32 pasid,

					   void **vm, void **process_info,
@@ -1138,21 +1100,6 @@ void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev, 
	}

}



void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm)

{

	struct amdgpu_device *adev = get_amdgpu_device(kgd);

	struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;



	if (WARN_ON(!kgd || !vm))

		return;



	pr_debug("Destroying process vm %p\n", vm);



	/* Release the VM context */

	amdgpu_vm_fini(adev, avm);

	kfree(vm);

}



void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm)

{

	struct amdgpu_device *adev = get_amdgpu_device(kgd);

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

+13 −0
Original line number Diff line number Diff line
@@ -908,6 +908,19 @@ int amdgpu_display_gem_fb_verify_and_init( 
					 &amdgpu_fb_funcs);

	if (ret)

		goto err;

	/* Verify that the modifier is supported. */

	if (!drm_any_plane_has_format(dev, mode_cmd->pixel_format,

				      mode_cmd->modifier[0])) {

		struct drm_format_name_buf format_name;

		drm_dbg_kms(dev,

			    "unsupported pixel format %s / modifier 0x%llx\n",

			    drm_get_format_name(mode_cmd->pixel_format,

						&format_name),

			    mode_cmd->modifier[0]);



		ret = -EINVAL;

		goto err;

	}



	ret = amdgpu_display_framebuffer_init(dev, rfb, mode_cmd, obj);

	if (ret)

drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c

+2 −2
Original line number Diff line number Diff line
@@ -291,8 +291,8 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach, 
		break;



	case TTM_PL_VRAM:

		r = amdgpu_vram_mgr_alloc_sgt(adev, &bo->tbo.mem, attach->dev,

					      dir, &sgt);

		r = amdgpu_vram_mgr_alloc_sgt(adev, &bo->tbo.mem, 0,

				bo->tbo.base.size, attach->dev, dir, &sgt);

		if (r)

			return ERR_PTR(r);

		break;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+2 −2
Original line number Diff line number Diff line
@@ -185,7 +185,7 @@ uint amdgpu_ras_mask = 0xffffffff; 
int amdgpu_bad_page_threshold = -1;

struct amdgpu_watchdog_timer amdgpu_watchdog_timer = {

	.timeout_fatal_disable = false,

	.period = 0x23, /* default to max. timeout = 1 << 0x23 cycles */

	.period = 0x0, /* default to 0x0 (timeout disable) */

};



/**
@@ -553,7 +553,7 @@ module_param_named(timeout_fatal_disable, amdgpu_watchdog_timer.timeout_fatal_di 
 * DOC: timeout_period (uint)

 * Modify the watchdog timeout max_cycles as (1 << period)

 */

MODULE_PARM_DESC(timeout_period, "watchdog timeout period (1 to 0x23(default), timeout maxCycles = (1 << period)");

MODULE_PARM_DESC(timeout_period, "watchdog timeout period (0 = timeout disabled, 1 ~ 0x23 = timeout maxcycles = (1 << period)");

module_param_named(timeout_period, amdgpu_watchdog_timer.period, uint, 0644);



/**