Commit 1cd6b4a0 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2021-04-27' of... 

Merge tag 'drm-intel-next-fixes-2021-04-27' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

drm/i915 fixes for v5.13-rc1:
- Several fixes to GLK handling in recent display refactoring (Ville)
- Rare watchdog timer race fix (Tvrtko)
- Cppcheck redundant condition fix (José)
- Overlay error code propagation fix (Dan Carpenter)
- Documentation fix (Maarten)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/871raw5d3g.fsf@intel.com
parents add74e32 270e3cc5

drivers/gpu/drm/i915/display/intel_display.c

+2 −1
Original line number Diff line number Diff line
@@ -1403,7 +1403,8 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane) 
		 * require the entire fb to accommodate that to avoid

		 * potential runtime errors at plane configuration time.

		 */

		if (IS_DISPLAY_VER(dev_priv, 9) && color_plane == 0 && fb->width > 3840)

		if ((IS_DISPLAY_VER(dev_priv, 9) || IS_GEMINILAKE(dev_priv)) &&

		    color_plane == 0 && fb->width > 3840)

			tile_width *= 4;

		/*

		 * The main surface pitch must be padded to a multiple of four

drivers/gpu/drm/i915/display/intel_dp_link_training.c

+1 −1
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp) 
	 * Detecting LTTPRs must be avoided on platforms with an AUX timeout

	 * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).

	 */

	if (DISPLAY_VER(i915) < 10)

	if (DISPLAY_VER(i915) < 10 || IS_GEMINILAKE(i915))

		return false;



	if (drm_dp_read_lttpr_common_caps(&intel_dp->aux,

drivers/gpu/drm/i915/display/intel_fbc.c

+1 −1
Original line number Diff line number Diff line
@@ -597,7 +597,7 @@ static bool stride_is_valid(struct drm_i915_private *dev_priv, 
		return false;



	/* Display WA #1105: skl,bxt,kbl,cfl,glk */

	if (IS_DISPLAY_VER(dev_priv, 9) &&

	if ((IS_DISPLAY_VER(dev_priv, 9) || IS_GEMINILAKE(dev_priv)) &&

	    modifier == DRM_FORMAT_MOD_LINEAR && stride & 511)

		return false;

drivers/gpu/drm/i915/display/intel_overlay.c

+3 −1
Original line number Diff line number Diff line
@@ -803,8 +803,10 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, 
	atomic_inc(&dev_priv->gpu_error.pending_fb_pin);



	vma = intel_overlay_pin_fb(new_bo);

	if (IS_ERR(vma))

	if (IS_ERR(vma)) {

		ret = PTR_ERR(vma);

		goto out_pin_section;

	}



	i915_gem_object_flush_frontbuffer(new_bo, ORIGIN_DIRTYFB);

drivers/gpu/drm/i915/display/intel_psr.c

+1 −2
Original line number Diff line number Diff line
@@ -1519,8 +1519,7 @@ void intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state) 
		u32 psr_status;



		mutex_lock(&intel_dp->psr.lock);

		if (!intel_dp->psr.enabled ||

		    (intel_dp->psr.enabled && intel_dp->psr.psr2_enabled)) {

		if (!intel_dp->psr.enabled || intel_dp->psr.psr2_enabled) {

			mutex_unlock(&intel_dp->psr.lock);

			continue;

		}