Loading drivers/net/ethernet/sfc/ptp.c +1 −15 Original line number Diff line number Diff line Loading @@ -237,9 +237,6 @@ struct efx_ptp_timeset { * @evt_code: Last event code * @start: Address at which MC indicates ready for synchronisation * @host_time_pps: Host time at last PPS * @last_sync_ns: Last number of nanoseconds between readings when synchronising * @base_sync_ns: Number of nanoseconds for last synchronisation. * @base_sync_valid: Whether base_sync_time is valid. * @current_adjfreq: Current ppb adjustment. * @phc_clock: Pointer to registered phc device * @phc_clock_info: Registration structure for phc device Loading Loading @@ -274,9 +271,6 @@ struct efx_ptp_data { int evt_code; struct efx_buffer start; struct pps_event_time host_time_pps; unsigned last_sync_ns; unsigned base_sync_ns; bool base_sync_valid; s64 current_adjfreq; struct ptp_clock *phc_clock; struct ptp_clock_info phc_clock_info; Loading Loading @@ -482,18 +476,10 @@ efx_ptp_process_times(struct efx_nic *efx, MCDI_DECLARE_STRUCT_PTR(synch_buf), if (ngood == 0) { netif_warn(efx, drv, efx->net_dev, "PTP no suitable synchronisations %dns\n", ptp->base_sync_ns); "PTP no suitable synchronisations\n"); return -EAGAIN; } /* Average minimum this synchronisation */ ptp->last_sync_ns = DIV_ROUND_UP(total, ngood); if (!ptp->base_sync_valid || (ptp->last_sync_ns < ptp->base_sync_ns)) { ptp->base_sync_valid = true; ptp->base_sync_ns = ptp->last_sync_ns; } /* Calculate delay from actual PPS to last_time */ delta.tv_nsec = ptp->timeset[last_good].nanoseconds + Loading Loading
drivers/net/ethernet/sfc/ptp.c +1 −15 Original line number Diff line number Diff line Loading @@ -237,9 +237,6 @@ struct efx_ptp_timeset { * @evt_code: Last event code * @start: Address at which MC indicates ready for synchronisation * @host_time_pps: Host time at last PPS * @last_sync_ns: Last number of nanoseconds between readings when synchronising * @base_sync_ns: Number of nanoseconds for last synchronisation. * @base_sync_valid: Whether base_sync_time is valid. * @current_adjfreq: Current ppb adjustment. * @phc_clock: Pointer to registered phc device * @phc_clock_info: Registration structure for phc device Loading Loading @@ -274,9 +271,6 @@ struct efx_ptp_data { int evt_code; struct efx_buffer start; struct pps_event_time host_time_pps; unsigned last_sync_ns; unsigned base_sync_ns; bool base_sync_valid; s64 current_adjfreq; struct ptp_clock *phc_clock; struct ptp_clock_info phc_clock_info; Loading Loading @@ -482,18 +476,10 @@ efx_ptp_process_times(struct efx_nic *efx, MCDI_DECLARE_STRUCT_PTR(synch_buf), if (ngood == 0) { netif_warn(efx, drv, efx->net_dev, "PTP no suitable synchronisations %dns\n", ptp->base_sync_ns); "PTP no suitable synchronisations\n"); return -EAGAIN; } /* Average minimum this synchronisation */ ptp->last_sync_ns = DIV_ROUND_UP(total, ngood); if (!ptp->base_sync_valid || (ptp->last_sync_ns < ptp->base_sync_ns)) { ptp->base_sync_valid = true; ptp->base_sync_ns = ptp->last_sync_ns; } /* Calculate delay from actual PPS to last_time */ delta.tv_nsec = ptp->timeset[last_good].nanoseconds + Loading