Commit 9106536c authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull pci fixes from Bjorn Helgaas:

 - Add Manivannan Sadhasivam as DesignWare PCIe driver co-maintainer
   (Krzysztof Wilczyński)

 - Revert "PCI: dwc: Wait for link up only if link is started" to fix a
   regression on Qualcomm platforms that don't reach interconnect sync
   state if the slot is empty (Johan Hovold)

 - Revert "PCI: mvebu: Mark driver as BROKEN" so people can use
   pci-mvebu even though some others report problems (Bjorn Helgaas)

 - Avoid a NULL pointer dereference when using acpiphp for root bus
   hotplug to fix a regression added in v6.5-rc1 (Igor Mammedov)

* tag 'pci-v6.5-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
  PCI: acpiphp: Use pci_assign_unassigned_bridge_resources() only for non-root bus
  Revert "PCI: mvebu: Mark driver as BROKEN"
  Revert "PCI: dwc: Wait for link up only if link is started"
  MAINTAINERS: Add Manivannan Sadhasivam as DesignWare PCIe driver maintainer
parents 2a3c17ed cc22522f
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+1 −0
Original line number Diff line number Diff line
@@ -16293,6 +16293,7 @@ F: drivers/pci/controller/dwc/pci-exynos.c
PCI DRIVER FOR SYNOPSYS DESIGNWARE
M:	Jingoo Han <jingoohan1@gmail.com>
M:	Gustavo Pimentel <gustavo.pimentel@synopsys.com>
M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
L:	linux-pci@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
+0 −1
Original line number Diff line number Diff line
@@ -179,7 +179,6 @@ config PCI_MVEBU
	depends on MVEBU_MBUS
	depends on ARM
	depends on OF
	depends on BROKEN
	select PCI_BRIDGE_EMUL
	help
	 Add support for Marvell EBU PCIe controller. This PCIe controller
+4 −9
Original line number Diff line number Diff line
@@ -485,20 +485,15 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
	if (ret)
		goto err_remove_edma;

	if (dw_pcie_link_up(pci)) {
		dw_pcie_print_link_status(pci);
	} else {
	if (!dw_pcie_link_up(pci)) {
		ret = dw_pcie_start_link(pci);
		if (ret)
			goto err_remove_edma;

		if (pci->ops && pci->ops->start_link) {
			ret = dw_pcie_wait_for_link(pci);
			if (ret)
				goto err_stop_link;
		}
	}

	/* Ignore errors, the link may come up later */
	dw_pcie_wait_for_link(pci);

	bridge->sysdata = pp;

	ret = pci_host_probe(bridge);
+7 −13
Original line number Diff line number Diff line
@@ -644,20 +644,9 @@ void dw_pcie_disable_atu(struct dw_pcie *pci, u32 dir, int index)
	dw_pcie_writel_atu(pci, dir, index, PCIE_ATU_REGION_CTRL2, 0);
}

void dw_pcie_print_link_status(struct dw_pcie *pci)
{
	u32 offset, val;

	offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
	val = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);

	dev_info(pci->dev, "PCIe Gen.%u x%u link up\n",
		 FIELD_GET(PCI_EXP_LNKSTA_CLS, val),
		 FIELD_GET(PCI_EXP_LNKSTA_NLW, val));
}

int dw_pcie_wait_for_link(struct dw_pcie *pci)
{
	u32 offset, val;
	int retries;

	/* Check if the link is up or not */
@@ -673,7 +662,12 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci)
		return -ETIMEDOUT;
	}

	dw_pcie_print_link_status(pci);
	offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
	val = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);

	dev_info(pci->dev, "PCIe Gen.%u x%u link up\n",
		 FIELD_GET(PCI_EXP_LNKSTA_CLS, val),
		 FIELD_GET(PCI_EXP_LNKSTA_NLW, val));

	return 0;
}
+0 −1
Original line number Diff line number Diff line
@@ -429,7 +429,6 @@ void dw_pcie_setup(struct dw_pcie *pci);
void dw_pcie_iatu_detect(struct dw_pcie *pci);
int dw_pcie_edma_detect(struct dw_pcie *pci);
void dw_pcie_edma_remove(struct dw_pcie *pci);
void dw_pcie_print_link_status(struct dw_pcie *pci);

static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val)
{
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