Commit 907a196f authored by Kan Liang's avatar Kan Liang Committed by Peter Zijlstra
Browse files

perf/x86/msr: Add Rocket Lake CPU support 



Like Ice Lake and Tiger Lake, PPERF and SMI_COUNT MSRs are also
supported by Rocket Lake.

Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20201019153528.13850-3-kan.liang@linux.intel.com
parent cbea5639

arch/x86/events/msr.c

+1 −0
Original line number Diff line number Diff line
@@ -99,6 +99,7 @@ static bool test_intel(int idx, void *data) 
	case INTEL_FAM6_ICELAKE_D:

	case INTEL_FAM6_TIGERLAKE_L:

	case INTEL_FAM6_TIGERLAKE:

	case INTEL_FAM6_ROCKETLAKE:

		if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)

			return true;

		break;