Commit 8f6e5de6 authored by José Roberto de Souza's avatar José Roberto de Souza Committed by sanglipeng
Browse files

drm/i915/gen11+: Only load DRAM information from pcode

stable inclusion
from stable-v5.10.185
commit f73ec12dc718ee90ec45fd23dad38c5020a5b1f5
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8L5XP

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=f73ec12dc718ee90ec45fd23dad38c5020a5b1f5



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[ Upstream commit 5d0c938e ]

Up to now we were reading some DRAM information from MCHBAR register
and from pcode what is already not good but some GEN12(TGL-H and ADL-S)
platforms have MCHBAR DRAM information in different offsets.

This was notified to HW team that decided that the best alternative is
always apply the 16gb_dimm watermark adjustment for GEN12+ platforms
and read the remaning DRAM information needed to other display
programming from pcode.

So here moving the DRAM pcode function to intel_dram.c, removing
the duplicated fields from intel_qgv_info, setting and using
information from dram_info.

v2:
- bring back num_points to intel_qgv_info as num_qgv_point can be
overwritten in icl_get_qgv_points()
- add gen12_get_dram_info() and simplify gen11_get_dram_info()

Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210128164312.91160-2-jose.souza@intel.com


Signed-off-by: default avatarHenning Schild <henning.schild@siemens.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarsanglipeng <sanglipeng1@jd.com>
parent 1c23f9ec
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