Commit 8f3f2ccf authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MMC fixes from Ulf Hansson
 "MMC core:
   - Clear flags before allowing to retune

  MMC host:
   - sdhci: Clear unused bounce buffer at DMA mmap error path
   - sdhci: Fix warning message when accessing RPMB in HS400 mode
   - sdhci-of-arasan: Use clock-frequency property to update clk_xin
   - mtk-sd: Fixup compatible string for MT8195"

* tag 'mmc-v5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  mmc: sdhci: Fix warning message when accessing RPMB in HS400 mode
  dt-bindings: mmc: change compatiable string for MT8195 mmc host IP
  mmc: sdhci: Clear unused bounce buffer at DMA mmap error path
  phy: intel: Fix for warnings due to EMMC clock 175Mhz change in FIP
  mmc: sdhci-of-arasan: Use clock-frequency property to update clk_xin
  mmc: core: clear flags before allowing to retune
parents b8052599 d0244847
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+2 −0
Original line number Diff line number Diff line
@@ -31,6 +31,8 @@ properties:
          - const: mediatek,mt2701-mmc
      - items:
          - const: mediatek,mt8192-mmc
          - const: mediatek,mt8183-mmc
      - items:
          - const: mediatek,mt8195-mmc
          - const: mediatek,mt8183-mmc

+5 −2
Original line number Diff line number Diff line
@@ -937,11 +937,14 @@ int mmc_execute_tuning(struct mmc_card *card)

	err = host->ops->execute_tuning(host, opcode);

	if (err)
	if (err) {
		pr_err("%s: tuning execution failed: %d\n",
			mmc_hostname(host), err);
	else
	} else {
		host->retune_now = 0;
		host->need_retune = 0;
		mmc_retune_enable(host);
	}

	return err;
}
+12 −2
Original line number Diff line number Diff line
@@ -1542,6 +1542,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
		}
	}

	sdhci_get_of_property(pdev);

	sdhci_arasan->clk_ahb = devm_clk_get(dev, "clk_ahb");
	if (IS_ERR(sdhci_arasan->clk_ahb)) {
		ret = dev_err_probe(dev, PTR_ERR(sdhci_arasan->clk_ahb),
@@ -1561,14 +1563,22 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
		goto err_pltfm_free;
	}

	/* If clock-frequency property is set, use the provided value */
	if (pltfm_host->clock &&
	    pltfm_host->clock != clk_get_rate(clk_xin)) {
		ret = clk_set_rate(clk_xin, pltfm_host->clock);
		if (ret) {
			dev_err(&pdev->dev, "Failed to set SD clock rate\n");
			goto clk_dis_ahb;
		}
	}

	ret = clk_prepare_enable(clk_xin);
	if (ret) {
		dev_err(dev, "Unable to enable SD clock.\n");
		goto clk_dis_ahb;
	}

	sdhci_get_of_property(pdev);

	if (of_property_read_bool(np, "xlnx,fails-without-test-cd"))
		sdhci_arasan->quirks |= SDHCI_ARASAN_QUIRK_FORCE_CDTEST;

+9 −1
Original line number Diff line number Diff line
@@ -1812,6 +1812,10 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host)
	u16 preset = 0;

	switch (host->timing) {
	case MMC_TIMING_MMC_HS:
	case MMC_TIMING_SD_HS:
		preset = sdhci_readw(host, SDHCI_PRESET_FOR_HIGH_SPEED);
		break;
	case MMC_TIMING_UHS_SDR12:
		preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR12);
		break;
@@ -4072,9 +4076,13 @@ static void sdhci_allocate_bounce_buffer(struct sdhci_host *host)
					   bounce_size,
					   DMA_BIDIRECTIONAL);
	ret = dma_mapping_error(mmc_dev(mmc), host->bounce_addr);
	if (ret)
	if (ret) {
		devm_kfree(mmc_dev(mmc), host->bounce_buffer);
		host->bounce_buffer = NULL;
		/* Again fall back to max_segs == 1 */
		return;
	}

	host->bounce_buffer_size = bounce_size;

	/* Lie about this since we're bouncing */
+1 −0
Original line number Diff line number Diff line
@@ -255,6 +255,7 @@

/* 60-FB reserved */

#define SDHCI_PRESET_FOR_HIGH_SPEED	0x64
#define SDHCI_PRESET_FOR_SDR12 0x66
#define SDHCI_PRESET_FOR_SDR25 0x68
#define SDHCI_PRESET_FOR_SDR50 0x6A
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