Commit 8cded8fb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_core_for_v6.1_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 core fixes from Borislav Petkov:

 - Make sure an INT3 is slapped after every unconditional retpoline JMP
   as both vendors suggest

 - Clean up pciserial a bit

* tag 'x86_core_for_v6.1_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86,retpoline: Be sure to emit INT3 after JMP *%\reg
  x86/earlyprintk: Clean up pciserial
parents 5bb3a16d 8c03af3e
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+9 −0
Original line number Diff line number Diff line
@@ -453,6 +453,15 @@ static int patch_retpoline(void *addr, struct insn *insn, u8 *bytes)
		return ret;
	i += ret;

	/*
	 * The compiler is supposed to EMIT an INT3 after every unconditional
	 * JMP instruction due to AMD BTC. However, if the compiler is too old
	 * or SLS isn't enabled, we still need an INT3 after indirect JMPs
	 * even on Intel.
	 */
	if (op == JMP32_INSN_OPCODE && i < insn->length)
		bytes[i++] = INT3_INSN_OPCODE;

	for (; i < insn->length;)
		bytes[i++] = BYTES_NOP1;

+7 −7
Original line number Diff line number Diff line
@@ -264,11 +264,11 @@ static __init void early_pci_serial_init(char *s)
	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);

	/*
	 * Verify it is a UART type device
	 * Verify it is a 16550-UART type device
	 */
	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
	     (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) ||
	   (((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */ {
	    (((classcode >> 8) & 0xff) != PCI_SERIAL_16550_COMPATIBLE)) {
		if (!force)
			return;
	}
@@ -276,11 +276,11 @@ static __init void early_pci_serial_init(char *s)
	/*
	 * Determine if it is IO or memory mapped
	 */
	if (bar0 & 0x01) {
	if ((bar0 & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
		/* it is IO mapped */
		serial_in = io_serial_in;
		serial_out = io_serial_out;
		early_serial_base = bar0&0xfffffffc;
		early_serial_base = bar0 & PCI_BASE_ADDRESS_IO_MASK;
		write_pci_config(bus, slot, func, PCI_COMMAND,
				 cmdreg|PCI_COMMAND_IO);
	} else {
@@ -289,7 +289,7 @@ static __init void early_pci_serial_init(char *s)
		serial_out = mem32_serial_out;
		/* WARNING! assuming the address is always in the first 4G */
		early_serial_base =
			(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
			(unsigned long)early_ioremap(bar0 & PCI_BASE_ADDRESS_MEM_MASK, 0x10);
		write_pci_config(bus, slot, func, PCI_COMMAND,
				 cmdreg|PCI_COMMAND_MEMORY);
	}
+3 −1
Original line number Diff line number Diff line
@@ -419,7 +419,9 @@ static void emit_indirect_jump(u8 **pprog, int reg, u8 *ip)
		OPTIMIZER_HIDE_VAR(reg);
		emit_jump(&prog, &__x86_indirect_thunk_array[reg], ip);
	} else {
		EMIT2(0xFF, 0xE0 + reg);
		EMIT2(0xFF, 0xE0 + reg);	/* jmp *%\reg */
		if (IS_ENABLED(CONFIG_RETPOLINE) || IS_ENABLED(CONFIG_SLS))
			EMIT1(0xCC);		/* int3 */
	}

	*pprog = prog;
+3 −0
Original line number Diff line number Diff line
@@ -75,6 +75,9 @@
#define PCI_CLASS_COMMUNICATION_MODEM	0x0703
#define PCI_CLASS_COMMUNICATION_OTHER	0x0780

/* Interface for SERIAL/MODEM */
#define PCI_SERIAL_16550_COMPATIBLE	0x02

#define PCI_BASE_CLASS_SYSTEM		0x08
#define PCI_CLASS_SYSTEM_PIC		0x0800
#define PCI_CLASS_SYSTEM_PIC_IOAPIC	0x080010