Commit 8c03af3e authored by Peter Zijlstra's avatar Peter Zijlstra
Browse files

x86,retpoline: Be sure to emit INT3 after JMP *%\reg 



Both AMD and Intel recommend using INT3 after an indirect JMP. Make sure
to emit one when rewriting the retpoline JMP irrespective of compiler
SLS options or even CONFIG_SLS.

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: default avatarAlexei Starovoitov <alexei.starovoitov@gmail.com>
Link: https://lkml.kernel.org/r/Yxm+QkFPOhrVSH6q@hirez.programming.kicks-ass.net
parent bc12b70f

arch/x86/kernel/alternative.c

+9 −0
Original line number Diff line number Diff line
@@ -453,6 +453,15 @@ static int patch_retpoline(void *addr, struct insn *insn, u8 *bytes) 
		return ret;

	i += ret;



	/*

	 * The compiler is supposed to EMIT an INT3 after every unconditional

	 * JMP instruction due to AMD BTC. However, if the compiler is too old

	 * or SLS isn't enabled, we still need an INT3 after indirect JMPs

	 * even on Intel.

	 */

	if (op == JMP32_INSN_OPCODE && i < insn->length)

		bytes[i++] = INT3_INSN_OPCODE;



	for (; i < insn->length;)

		bytes[i++] = BYTES_NOP1;

arch/x86/net/bpf_jit_comp.c

+3 −1
Original line number Diff line number Diff line
@@ -419,7 +419,9 @@ static void emit_indirect_jump(u8 **pprog, int reg, u8 *ip) 
		OPTIMIZER_HIDE_VAR(reg);

		emit_jump(&prog, &__x86_indirect_thunk_array[reg], ip);

	} else {

		EMIT2(0xFF, 0xE0 + reg);

		EMIT2(0xFF, 0xE0 + reg);	/* jmp *%\reg */

		if (IS_ENABLED(CONFIG_RETPOLINE) || IS_ENABLED(CONFIG_SLS))

			EMIT1(0xCC);		/* int3 */

	}



	*pprog = prog;