Commit 8bd354b3 authored May 20, 2022 by Mark Brown Committed by Catalin Marinas May 20, 2022

arm64/sysreg: Generate definitions for CSSELR_EL1



Convert CSSELR_EL1 to automatic generation as per DDI0487H.a, no functional
change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220520161639.324236-5-broonie@kernel.org


Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

parent b5c0f105

arch/arm64/include/asm/sysreg.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -462,8 +462,6 @@
		#define SMIDR_EL1_SMPS_SHIFT 15
		#define SMIDR_EL1_AFFINITY_SHIFT 0

		#define SYS_CSSELR_EL1 sys_reg(3, 2, 0, 0, 0)

		#define SYS_CTR_EL0 sys_reg(3, 3, 0, 0, 1)
		#define SYS_DCZID_EL0 sys_reg(3, 3, 0, 0, 7)

arch/arm64/tools/sysreg

+7 −0

Original line number	Diff line number	Diff line
		@@ -262,6 +262,13 @@ Res0 14:12
		Field 11:0 AFFINITY
		EndSysreg

		Sysreg CSSELR_EL1 3 2 0 0 0
		Res0 63:5
		Field 4 TnD
		Field 3:1 Level
		Field 0 InD
		EndSysreg

		Sysreg SVCR 3 3 4 2 2
		Res0 63:2
		Field 1 ZA