Commit b5c0f105 authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
Browse files

arm64/sysreg: Generate definitions for CPACR_ELx



Convert the CPACR system register definitions to be automatically generated
using the definitions in DDI0487H.a. The kernel does have some additional
definitions for subfields of SMEN, FPEN and ZEN which are not identified as
distinct subfields in the architecture so the definitions are not updated
as part of this patch.

No functional change.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220520161639.324236-4-broonie@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 8c12e22c
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+0 −2
Original line number Diff line number Diff line
@@ -209,7 +209,6 @@
#define SYS_ID_AA64MMFR2_EL1		sys_reg(3, 0, 0, 7, 2)

#define SYS_ACTLR_EL1			sys_reg(3, 0, 1, 0, 1)
#define SYS_CPACR_EL1			sys_reg(3, 0, 1, 0, 2)
#define SYS_RGSR_EL1			sys_reg(3, 0, 1, 0, 5)
#define SYS_GCR_EL1			sys_reg(3, 0, 1, 0, 6)

@@ -614,7 +613,6 @@

/* VHE encodings for architectural EL0/1 system registers */
#define SYS_SCTLR_EL12			sys_reg(3, 5, 1, 0, 0)
#define SYS_CPACR_EL12			sys_reg(3, 5, 1, 0, 2)
#define SYS_TTBR0_EL12			sys_reg(3, 5, 2, 0, 0)
#define SYS_TTBR1_EL12			sys_reg(3, 5, 2, 0, 1)
#define SYS_TCR_EL12			sys_reg(3, 5, 2, 0, 2)
+20 −0
Original line number Diff line number Diff line
@@ -185,6 +185,22 @@ Field 1 A
Field	0	M
EndSysreg

SysregFields	CPACR_ELx
Res0	63:29
Field	28	TTA
Res0	27:26
Field	25:24	SMEN
Res0	23:22
Field	21:20	FPEN
Res0	19:18
Field	17:16	ZEN
Res0	15:0
EndSysregFields

Sysreg	CPACR_EL1	3	0	1	0	2
Fields	CPACR_ELx
EndSysreg

Sysreg	SMPRI_EL1	3	0	1	2	4
Res0	63:4
Field	3:0	PRIORITY
@@ -283,6 +299,10 @@ Sysreg CONTEXTIDR_EL2 3 4 13 0 1
Fields	CONTEXTIDR_ELx
EndSysreg

Sysreg	CPACR_EL12	3	5	1	0	2
Fields	CPACR_ELx
EndSysreg

Sysreg	ZCR_EL12	3	5	1	2	0
Fields	ZCR_ELx
EndSysreg