Commit 8b2251f7 authored by Anson Huang's avatar Anson Huang Committed by Rob Herring
Browse files

dt-bindings: nvmem: Convert i.MX OCOTP to json-schema



Convert the i.MX OCOTP binding to DT schema format using json-schema.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 493d8f46
Loading
Loading
Loading
Loading
+0 −50
Original line number Diff line number Diff line
Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings

This binding represents the on-chip eFuse OTP controller found on
i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.

Required properties:
- compatible: should be one of
	"fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
	"fsl,imx6sl-ocotp" (i.MX6SL), or
	"fsl,imx6sx-ocotp" (i.MX6SX),
	"fsl,imx6ul-ocotp" (i.MX6UL),
	"fsl,imx6ull-ocotp" (i.MX6ULL/ULZ),
	"fsl,imx7d-ocotp" (i.MX7D/S),
	"fsl,imx6sll-ocotp" (i.MX6SLL),
	"fsl,imx7ulp-ocotp" (i.MX7ULP),
	"fsl,imx8mq-ocotp" (i.MX8MQ),
	"fsl,imx8mm-ocotp" (i.MX8MM),
	"fsl,imx8mn-ocotp" (i.MX8MN),
	"fsl,imx8mp-ocotp" (i.MX8MP),
	followed by "syscon".
- #address-cells : Should be 1
- #size-cells : Should be 1
- reg: Should contain the register base and length.
- clocks: Should contain a phandle pointing to the gated peripheral clock.

Optional properties:
- read-only: disable write access

Optional Child nodes:

- Data cells of ocotp:
  Detailed bindings are described in bindings/nvmem/nvmem.txt

Example:
	ocotp: ocotp@21bc000 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "fsl,imx6sx-ocotp", "syscon";
		reg = <0x021bc000 0x4000>;
		clocks = <&clks IMX6SX_CLK_OCOTP>;

		tempmon_calib: calib@38 {
			reg = <0x38 4>;
		};

		tempmon_temp_grade: temp-grade@20 {
			reg = <0x20 4>;
		};
	};
+95 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings

maintainers:
  - Anson Huang <Anson.Huang@nxp.com>

description: |
  This binding represents the on-chip eFuse OTP controller found on
  i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
  i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.

allOf:
  - $ref: "nvmem.yaml#"

properties:
  compatible:
    items:
      - enum:
        - fsl,imx6q-ocotp
        - fsl,imx6sl-ocotp
        - fsl,imx6sx-ocotp
        - fsl,imx6ul-ocotp
        - fsl,imx6ull-ocotp
        - fsl,imx7d-ocotp
        - fsl,imx6sll-ocotp
        - fsl,imx7ulp-ocotp
        - fsl,imx8mq-ocotp
        - fsl,imx8mm-ocotp
        - fsl,imx8mn-ocotp
        - fsl,imx8mp-ocotp
      - const: syscon

  reg:
    maxItems: 1

  "#address-cells":
    const: 1

  "#size-cells":
    const: 1

  clocks:
    maxItems: 1

required:
  - "#address-cells"
  - "#size-cells"
  - compatible
  - reg

patternProperties:
  "^.*@[0-9a-f]+$":
    type: object

    properties:
      reg:
        maxItems: 1
        description:
          Offset and size in bytes within the storage device.

    required:
      - reg

    additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx6sx-clock.h>

    ocotp: efuse@21bc000 {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "fsl,imx6sx-ocotp", "syscon";
        reg = <0x021bc000 0x4000>;
        clocks = <&clks IMX6SX_CLK_OCOTP>;

        cpu_speed_grade: speed-grade@10 {
            reg = <0x10 4>;
        };

        tempmon_calib: calib@38 {
            reg = <0x38 4>;
        };

        tempmon_temp_grade: temp-grade@20 {
            reg = <0x20 4>;
        };
    };

...