Commit 8ade5125 authored by James Clark's avatar James Clark Committed by Junhao He
Browse files

arm: pmu: Share user ABI format mechanism with SPE 

mainline inclusion
from mainline-v6.8-rc1
commit f6da86969a3c284466ab6080764b2ed91689f262
category: cleanup
bugzilla: https://gitee.com/openeuler/kernel/issues/I9Q7QP
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=f6da86969a3c284466ab6080764b2ed91689f262



--------------------------------

This mechanism makes it much easier to define and read new attributes
so move it to the arm_pmu.h header so that it can be shared. At the same
time update the existing format attributes to use it.

GENMASK has to be changed to GENMASK_ULL because the config fields are
64 bits even on arm32 where this will also be used now.

Signed-off-by: default avatarJames Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20231211161331.1277825-7-james.clark@arm.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
Signed-off-by: default avatarJunhao He <hejunhao3@huawei.com>
parent 7d9869ac

drivers/perf/arm_pmuv3.c

+16 −5
Original line number Diff line number Diff line
@@ -299,20 +299,31 @@ static const struct attribute_group armv8_pmuv3_events_attr_group = { 
	.is_visible = armv8pmu_event_attr_is_visible,

};



PMU_FORMAT_ATTR(event, "config:0-15");

PMU_FORMAT_ATTR(long, "config1:0");

PMU_FORMAT_ATTR(rdpmc, "config1:1");

/* User ABI */

#define ATTR_CFG_FLD_event_CFG		config

#define ATTR_CFG_FLD_event_LO		0

#define ATTR_CFG_FLD_event_HI		15

#define ATTR_CFG_FLD_long_CFG		config1

#define ATTR_CFG_FLD_long_LO		0

#define ATTR_CFG_FLD_long_HI		0

#define ATTR_CFG_FLD_rdpmc_CFG		config1

#define ATTR_CFG_FLD_rdpmc_LO		1

#define ATTR_CFG_FLD_rdpmc_HI		1



GEN_PMU_FORMAT_ATTR(event);

GEN_PMU_FORMAT_ATTR(long);

GEN_PMU_FORMAT_ATTR(rdpmc);



static int sysctl_perf_user_access __read_mostly;



static bool armv8pmu_event_is_64bit(struct perf_event *event)

{

	return event->attr.config1 & 0x1;

	return ATTR_CFG_GET_FLD(&event->attr, long);

}



static bool armv8pmu_event_want_user_access(struct perf_event *event)

{

	return event->attr.config1 & 0x2;

	return ATTR_CFG_GET_FLD(&event->attr, rdpmc);

}



static struct attribute *armv8_pmuv3_format_attrs[] = {

drivers/perf/arm_spe_pmu.c

+0 −22
Original line number Diff line number Diff line
@@ -206,28 +206,6 @@ static const struct attribute_group arm_spe_pmu_cap_group = { 
#define ATTR_CFG_FLD_inv_event_filter_LO	0

#define ATTR_CFG_FLD_inv_event_filter_HI	63



/* Why does everything I do descend into this? */

#define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi)				\

	(lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi



#define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi)				\

	__GEN_PMU_FORMAT_ATTR(cfg, lo, hi)



#define GEN_PMU_FORMAT_ATTR(name)					\

	PMU_FORMAT_ATTR(name,						\

	_GEN_PMU_FORMAT_ATTR(ATTR_CFG_FLD_##name##_CFG,			\

			     ATTR_CFG_FLD_##name##_LO,			\

			     ATTR_CFG_FLD_##name##_HI))



#define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi)				\

	((((attr)->cfg) >> lo) & GENMASK(hi - lo, 0))



#define ATTR_CFG_GET_FLD(attr, name)					\

	_ATTR_CFG_GET_FLD(attr,						\

			  ATTR_CFG_FLD_##name##_CFG,			\

			  ATTR_CFG_FLD_##name##_LO,			\

			  ATTR_CFG_FLD_##name##_HI)



GEN_PMU_FORMAT_ATTR(ts_enable);

GEN_PMU_FORMAT_ATTR(pa_enable);

GEN_PMU_FORMAT_ATTR(pct_enable);

include/linux/perf/arm_pmu.h

+22 −0
Original line number Diff line number Diff line
@@ -193,4 +193,26 @@ void armpmu_free_irq(int irq, int cpu); 
#define ARMV8_SPE_PDEV_NAME "arm,spe-v1"

#define ARMV8_TRBE_PDEV_NAME "arm,trbe"



/* Why does everything I do descend into this? */

#define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi)				\

	(lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi



#define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi)				\

	__GEN_PMU_FORMAT_ATTR(cfg, lo, hi)



#define GEN_PMU_FORMAT_ATTR(name)					\

	PMU_FORMAT_ATTR(name,						\

	_GEN_PMU_FORMAT_ATTR(ATTR_CFG_FLD_##name##_CFG,			\

			     ATTR_CFG_FLD_##name##_LO,			\

			     ATTR_CFG_FLD_##name##_HI))



#define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi)				\

	((((attr)->cfg) >> lo) & GENMASK_ULL(hi - lo, 0))



#define ATTR_CFG_GET_FLD(attr, name)					\

	_ATTR_CFG_GET_FLD(attr,						\

			  ATTR_CFG_FLD_##name##_CFG,			\

			  ATTR_CFG_FLD_##name##_LO,			\

			  ATTR_CFG_FLD_##name##_HI)



#endif /* __ARM_PMU_H__ */