Commit 8a273a61 authored by Dave Jiang's avatar Dave Jiang Committed by Xiaochen Shen
Browse files

dmaengine: idxd: fix setting up priv mode for dwq

mainline inclusion
from mainline-v5.15
commit d8071323
category: bugfix
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I596WO


CVE: NA

Intel-SIG: commit d8071323 dmaengine: idxd: fix setting up priv mode for dwq.
Incremental backporting patches for DSA/IAA on Intel Xeon platform.

--------------------------------

DSA spec says WQ priv bit is 0 if the Privileged Mode Enable field of the
PCI Express PASID capability is 0 and pasid is enabled. Make sure that the
WQCFG priv field is set correctly according to usage type. Reject config if
setting up kernel WQ type and no support. Also add the correct priv setup
for a descriptor.

Fixes: 484f910e ("dmaengine: idxd: fix wq config registers offset programming")
Cc: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/162939084657.903168.14160019185148244596.stgit@djiang5-desk3.ch.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarXiaochen Shen <xiaochen.shen@intel.com>
parent 1f00f2b1
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment