Commit 8a1ed98f authored by Li Jun's avatar Li Jun Committed by Shawn Guo
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arm64: dts: imx8mp: correct usb clocks 



After commit cf7f3f4f ("clk: imx8mp: fix usb_root_clk parent"),
usb_root_clk is no longer for suspend clock so update dts accordingly
to use right bus clock and suspend clock.

Fixes: fb8587a2 ("arm64: dtsi: imx8mp: add usb nodes")
Cc: stable@vger.kernel.org # ed1f4ccf: clk: imx: imx8mp: add shared clk gate for usb suspend clk
Cc: stable@vger.kernel.org # v5.19+
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Tested-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarLi Jun <jun.li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b814eda9

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -1297,7 +1297,7 @@ 
			reg = <0x32f10100 0x8>,

			      <0x381f0000 0x20>;

			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,

				 <&clk IMX8MP_CLK_USB_ROOT>;

				 <&clk IMX8MP_CLK_USB_SUSP>;

			clock-names = "hsio", "suspend";

			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;

			power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
@@ -1310,9 +1310,9 @@ 
			usb_dwc3_0: usb@38100000 {

				compatible = "snps,dwc3";

				reg = <0x38100000 0x10000>;

				clocks = <&clk IMX8MP_CLK_HSIO_AXI>,

				clocks = <&clk IMX8MP_CLK_USB_ROOT>,

					 <&clk IMX8MP_CLK_USB_CORE_REF>,

					 <&clk IMX8MP_CLK_USB_ROOT>;

					 <&clk IMX8MP_CLK_USB_SUSP>;

				clock-names = "bus_early", "ref", "suspend";

				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;

				phys = <&usb3_phy0>, <&usb3_phy0>;
@@ -1339,7 +1339,7 @@ 
			reg = <0x32f10108 0x8>,

			      <0x382f0000 0x20>;

			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,

				 <&clk IMX8MP_CLK_USB_ROOT>;

				 <&clk IMX8MP_CLK_USB_SUSP>;

			clock-names = "hsio", "suspend";

			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;

			power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
@@ -1352,9 +1352,9 @@ 
			usb_dwc3_1: usb@38200000 {

				compatible = "snps,dwc3";

				reg = <0x38200000 0x10000>;

				clocks = <&clk IMX8MP_CLK_HSIO_AXI>,

				clocks = <&clk IMX8MP_CLK_USB_ROOT>,

					 <&clk IMX8MP_CLK_USB_CORE_REF>,

					 <&clk IMX8MP_CLK_USB_ROOT>;

					 <&clk IMX8MP_CLK_USB_SUSP>;

				clock-names = "bus_early", "ref", "suspend";

				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

				phys = <&usb3_phy1>, <&usb3_phy1>;