Commit 892f7237 authored by Marc Zyngier's avatar Marc Zyngier Committed by Will Deacon
Browse files

arm64: Delay initialisation of cpuinfo_arm64::reg_{zcr,smcr} 



Even if we are now able to tell the kernel to avoid exposing SVE/SME
from the command line, we still have a couple of places where we
unconditionally access the ZCR_EL1 (resp. SMCR_EL1) registers.

On systems with broken firmwares, this results in a crash even if
arm64.nosve (resp. arm64.nosme) was passed on the command-line.

To avoid this, only update cpuinfo_arm64::reg_{zcr,smcr} once
we have computed the sanitised version for the corresponding
feature registers (ID_AA64PFR0 for SVE, and ID_AA64PFR1 for
SME). This results in some minor refactoring.

Reviewed-by: default avatarMark Brown <broonie@kernel.org>
Reviewed-by: default avatarPeter Collingbourne <pcc@google.com>
Tested-by: default avatarPeter Collingbourne <pcc@google.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220720105219.1755096-1-maz@kernel.org


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent f96d67a8

arch/arm64/kernel/cpufeature.c

+29 −12
Original line number Diff line number Diff line
@@ -1001,14 +1001,23 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info) 
	if (id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0))

		init_32bit_cpu_features(&info->aarch32);



	if (id_aa64pfr0_sve(info->reg_id_aa64pfr0)) {

	if (IS_ENABLED(CONFIG_ARM64_SVE) &&

	    id_aa64pfr0_sve(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) {

		info->reg_zcr = read_zcr_features();

		init_cpu_ftr_reg(SYS_ZCR_EL1, info->reg_zcr);

		vec_init_vq_map(ARM64_VEC_SVE);

	}



	if (id_aa64pfr1_sme(info->reg_id_aa64pfr1)) {

	if (IS_ENABLED(CONFIG_ARM64_SME) &&

	    id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) {

		info->reg_smcr = read_smcr_features();

		/*

		 * We mask out SMPS since even if the hardware

		 * supports priorities the kernel does not at present

		 * and we block access to them.

		 */

		info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS;

		init_cpu_ftr_reg(SYS_SMCR_EL1, info->reg_smcr);

		if (IS_ENABLED(CONFIG_ARM64_SME))

		vec_init_vq_map(ARM64_VEC_SME);

	}
@@ -1241,23 +1250,31 @@ void update_cpu_features(int cpu, 
	taint |= check_update_ftr_reg(SYS_ID_AA64SMFR0_EL1, cpu,

				      info->reg_id_aa64smfr0, boot->reg_id_aa64smfr0);



	if (id_aa64pfr0_sve(info->reg_id_aa64pfr0)) {

	if (IS_ENABLED(CONFIG_ARM64_SVE) &&

	    id_aa64pfr0_sve(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1))) {

		info->reg_zcr = read_zcr_features();

		taint |= check_update_ftr_reg(SYS_ZCR_EL1, cpu,

					info->reg_zcr, boot->reg_zcr);



		/* Probe vector lengths, unless we already gave up on SVE */

		if (id_aa64pfr0_sve(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1)) &&

		    !system_capabilities_finalized())

		/* Probe vector lengths */

		if (!system_capabilities_finalized())

			vec_update_vq_map(ARM64_VEC_SVE);

	}



	if (id_aa64pfr1_sme(info->reg_id_aa64pfr1)) {

	if (IS_ENABLED(CONFIG_ARM64_SME) &&

	    id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) {

		info->reg_smcr = read_smcr_features();

		/*

		 * We mask out SMPS since even if the hardware

		 * supports priorities the kernel does not at present

		 * and we block access to them.

		 */

		info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS;

		taint |= check_update_ftr_reg(SYS_SMCR_EL1, cpu,

					info->reg_smcr, boot->reg_smcr);



		/* Probe vector lengths, unless we already gave up on SME */

		if (id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1)) &&

		    !system_capabilities_finalized())

		/* Probe vector lengths */

		if (!system_capabilities_finalized())

			vec_update_vq_map(ARM64_VEC_SME);

	}

arch/arm64/kernel/cpuinfo.c

+0 −16
Original line number Diff line number Diff line
@@ -439,22 +439,6 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info) 
	if (id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0))

		__cpuinfo_store_cpu_32bit(&info->aarch32);



	if (IS_ENABLED(CONFIG_ARM64_SVE) &&

	    id_aa64pfr0_sve(info->reg_id_aa64pfr0))

		info->reg_zcr = read_zcr_features();



	if (IS_ENABLED(CONFIG_ARM64_SME) &&

	    id_aa64pfr1_sme(info->reg_id_aa64pfr1)) {

		info->reg_smcr = read_smcr_features();



		/*

		 * We mask out SMPS since even if the hardware

		 * supports priorities the kernel does not at present

		 * and we block access to them.

		 */

		info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS;

	}



	cpuinfo_detect_icache_policy(info);

}