Commit 88f66a42 authored by Borislav Petkov's avatar Borislav Petkov
Browse files

x86/mce: Use mce_rdmsrl() in severity checking code 



MCA has its own special MSR accessors. Use them.

No functional changes.

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211208111343.8130-4-bp@alien8.de
parent ad669ec1

arch/x86/kernel/cpu/mce/core.c

+1 −1
Original line number Diff line number Diff line
@@ -362,7 +362,7 @@ void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr) 
}



/* MSR access wrappers used for error injection */

static noinstr u64 mce_rdmsrl(u32 msr)

noinstr u64 mce_rdmsrl(u32 msr)

{

	DECLARE_ARGS(val, low, high);

arch/x86/kernel/cpu/mce/internal.h

+2 −0
Original line number Diff line number Diff line
@@ -207,4 +207,6 @@ static inline void pentium_machine_check(struct pt_regs *regs) {} 
static inline void winchip_machine_check(struct pt_regs *regs) {}

#endif



noinstr u64 mce_rdmsrl(u32 msr);



#endif /* __X86_MCE_INTERNAL_H__ */

arch/x86/kernel/cpu/mce/severity.c

+3 −5
Original line number Diff line number Diff line
@@ -288,8 +288,7 @@ static int error_context(struct mce *m, struct pt_regs *regs) 


static int mce_severity_amd_smca(struct mce *m, enum context err_ctx)

{

	u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);

	u32 low, high;

	u64 mcx_cfg;



	/*

	 * We need to look at the following bits:
@@ -300,11 +299,10 @@ static int mce_severity_amd_smca(struct mce *m, enum context err_ctx) 
	if (!mce_flags.succor)

		return MCE_PANIC_SEVERITY;



	if (rdmsr_safe(addr, &low, &high))

		return MCE_PANIC_SEVERITY;

	mcx_cfg = mce_rdmsrl(MSR_AMD64_SMCA_MCx_CONFIG(m->bank));



	/* TCC (Task context corrupt). If set and if IN_KERNEL, panic. */

	if ((low & MCI_CONFIG_MCAX) &&

	if ((mcx_cfg & MCI_CONFIG_MCAX) &&

	    (m->status & MCI_STATUS_TCC) &&

	    (err_ctx == IN_KERNEL))

		return MCE_PANIC_SEVERITY;