Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c +4 −12 Original line number Diff line number Diff line Loading @@ -511,27 +511,19 @@ nv108_grctx_pack_tpc[] = { }; static const struct nvc0_graph_init nv108_grctx_init_ppc_0[] = { { 0x41be24, 1, 0x04, 0x00000006 }, nv108_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x10000000 }, { 0x41bec4, 1, 0x04, 0x00037f7f }, { 0x41bee4, 1, 0x04, 0x00000000 }, { 0x41bef0, 1, 0x04, 0x000003ff }, { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, { 0x41bf0c, 1, 0x04, 0x0e629062 }, { 0x41bf10, 1, 0x04, 0x0a418820 }, { 0x41bf14, 1, 0x04, 0x000000e6 }, { 0x41bfd0, 1, 0x04, 0x00900103 }, { 0x41bfe0, 1, 0x04, 0x00400001 }, { 0x41bfe4, 1, 0x04, 0x00000000 }, {} }; static const struct nvc0_graph_pack nv108_grctx_pack_ppc[] = { { nv108_grctx_init_ppc_0 }, { nve4_grctx_init_pes_0 }, { nv108_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h +4 −0 Original line number Diff line number Diff line Loading @@ -140,12 +140,16 @@ extern const struct nvc0_graph_init nvd9_grctx_init_sm_0[]; extern const struct nvc0_graph_init nvd7_grctx_init_pe_0[]; extern const struct nvc0_graph_init nvd7_grctx_init_wwdx_0[]; extern const struct nvc0_graph_init nve4_grctx_init_memfmt_0[]; extern const struct nvc0_graph_init nve4_grctx_init_ds_0[]; extern const struct nvc0_graph_init nve4_grctx_init_scc_0[]; extern const struct nvc0_graph_init nve4_grctx_init_gpm_0[]; extern const struct nvc0_graph_init nve4_grctx_init_pes_0[]; extern const struct nvc0_graph_pack nvf0_grctx_pack_mthd[]; extern const struct nvc0_graph_init nvf0_grctx_init_pri_0[]; Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c +14 −2 Original line number Diff line number Diff line Loading @@ -138,11 +138,21 @@ nvd7_grctx_pack_tpc[] = { }; static const struct nvc0_graph_init nvd7_grctx_init_ppc_0[] = { nvd7_grctx_init_pes_0[] = { { 0x41be24, 1, 0x04, 0x00000002 }, {} }; static const struct nvc0_graph_init nvd7_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x12180000 }, { 0x41bec4, 1, 0x04, 0x00003fff }, { 0x41bee4, 1, 0x04, 0x03240218 }, {} }; const struct nvc0_graph_init nvd7_grctx_init_wwdx_0[] = { { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, Loading @@ -157,7 +167,9 @@ nvd7_grctx_init_ppc_0[] = { static const struct nvc0_graph_pack nvd7_grctx_pack_ppc[] = { { nvd7_grctx_init_ppc_0 }, { nvd7_grctx_init_pes_0 }, { nvd7_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +10 −12 Original line number Diff line number Diff line Loading @@ -812,27 +812,25 @@ nve4_grctx_pack_tpc[] = { {} }; static const struct nvc0_graph_init nve4_grctx_init_ppc_0[] = { const struct nvc0_graph_init nve4_grctx_init_pes_0[] = { { 0x41be24, 1, 0x04, 0x00000006 }, {} }; static const struct nvc0_graph_init nve4_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x12180000 }, { 0x41bec4, 1, 0x04, 0x00037f7f }, { 0x41bee4, 1, 0x04, 0x06480430 }, { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, { 0x41bf0c, 1, 0x04, 0x0e629062 }, { 0x41bf10, 1, 0x04, 0x0a418820 }, { 0x41bf14, 1, 0x04, 0x000000e6 }, { 0x41bfd0, 1, 0x04, 0x00900103 }, { 0x41bfe0, 1, 0x04, 0x00400001 }, { 0x41bfe4, 1, 0x04, 0x00000000 }, {} }; static const struct nvc0_graph_pack nve4_grctx_pack_ppc[] = { { nve4_grctx_init_ppc_0 }, { nve4_grctx_init_pes_0 }, { nve4_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c +4 −12 Original line number Diff line number Diff line Loading @@ -790,26 +790,18 @@ nvf0_grctx_pack_tpc[] = { }; static const struct nvc0_graph_init nvf0_grctx_init_ppc_0[] = { { 0x41be24, 1, 0x04, 0x00000006 }, nvf0_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x10000000 }, { 0x41bec4, 1, 0x04, 0x00037f7f }, { 0x41bee4, 1, 0x04, 0x00000000 }, { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, { 0x41bf0c, 1, 0x04, 0x0e629062 }, { 0x41bf10, 1, 0x04, 0x0a418820 }, { 0x41bf14, 1, 0x04, 0x000000e6 }, { 0x41bfd0, 1, 0x04, 0x00900103 }, { 0x41bfe0, 1, 0x04, 0x00400001 }, { 0x41bfe4, 1, 0x04, 0x00000000 }, {} }; static const struct nvc0_graph_pack nvf0_grctx_pack_ppc[] = { { nvf0_grctx_init_ppc_0 }, { nve4_grctx_init_pes_0 }, { nvf0_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c +4 −12 Original line number Diff line number Diff line Loading @@ -511,27 +511,19 @@ nv108_grctx_pack_tpc[] = { }; static const struct nvc0_graph_init nv108_grctx_init_ppc_0[] = { { 0x41be24, 1, 0x04, 0x00000006 }, nv108_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x10000000 }, { 0x41bec4, 1, 0x04, 0x00037f7f }, { 0x41bee4, 1, 0x04, 0x00000000 }, { 0x41bef0, 1, 0x04, 0x000003ff }, { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, { 0x41bf0c, 1, 0x04, 0x0e629062 }, { 0x41bf10, 1, 0x04, 0x0a418820 }, { 0x41bf14, 1, 0x04, 0x000000e6 }, { 0x41bfd0, 1, 0x04, 0x00900103 }, { 0x41bfe0, 1, 0x04, 0x00400001 }, { 0x41bfe4, 1, 0x04, 0x00000000 }, {} }; static const struct nvc0_graph_pack nv108_grctx_pack_ppc[] = { { nv108_grctx_init_ppc_0 }, { nve4_grctx_init_pes_0 }, { nv108_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h +4 −0 Original line number Diff line number Diff line Loading @@ -140,12 +140,16 @@ extern const struct nvc0_graph_init nvd9_grctx_init_sm_0[]; extern const struct nvc0_graph_init nvd7_grctx_init_pe_0[]; extern const struct nvc0_graph_init nvd7_grctx_init_wwdx_0[]; extern const struct nvc0_graph_init nve4_grctx_init_memfmt_0[]; extern const struct nvc0_graph_init nve4_grctx_init_ds_0[]; extern const struct nvc0_graph_init nve4_grctx_init_scc_0[]; extern const struct nvc0_graph_init nve4_grctx_init_gpm_0[]; extern const struct nvc0_graph_init nve4_grctx_init_pes_0[]; extern const struct nvc0_graph_pack nvf0_grctx_pack_mthd[]; extern const struct nvc0_graph_init nvf0_grctx_init_pri_0[]; Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c +14 −2 Original line number Diff line number Diff line Loading @@ -138,11 +138,21 @@ nvd7_grctx_pack_tpc[] = { }; static const struct nvc0_graph_init nvd7_grctx_init_ppc_0[] = { nvd7_grctx_init_pes_0[] = { { 0x41be24, 1, 0x04, 0x00000002 }, {} }; static const struct nvc0_graph_init nvd7_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x12180000 }, { 0x41bec4, 1, 0x04, 0x00003fff }, { 0x41bee4, 1, 0x04, 0x03240218 }, {} }; const struct nvc0_graph_init nvd7_grctx_init_wwdx_0[] = { { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, Loading @@ -157,7 +167,9 @@ nvd7_grctx_init_ppc_0[] = { static const struct nvc0_graph_pack nvd7_grctx_pack_ppc[] = { { nvd7_grctx_init_ppc_0 }, { nvd7_grctx_init_pes_0 }, { nvd7_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +10 −12 Original line number Diff line number Diff line Loading @@ -812,27 +812,25 @@ nve4_grctx_pack_tpc[] = { {} }; static const struct nvc0_graph_init nve4_grctx_init_ppc_0[] = { const struct nvc0_graph_init nve4_grctx_init_pes_0[] = { { 0x41be24, 1, 0x04, 0x00000006 }, {} }; static const struct nvc0_graph_init nve4_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x12180000 }, { 0x41bec4, 1, 0x04, 0x00037f7f }, { 0x41bee4, 1, 0x04, 0x06480430 }, { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, { 0x41bf0c, 1, 0x04, 0x0e629062 }, { 0x41bf10, 1, 0x04, 0x0a418820 }, { 0x41bf14, 1, 0x04, 0x000000e6 }, { 0x41bfd0, 1, 0x04, 0x00900103 }, { 0x41bfe0, 1, 0x04, 0x00400001 }, { 0x41bfe4, 1, 0x04, 0x00000000 }, {} }; static const struct nvc0_graph_pack nve4_grctx_pack_ppc[] = { { nve4_grctx_init_ppc_0 }, { nve4_grctx_init_pes_0 }, { nve4_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c +4 −12 Original line number Diff line number Diff line Loading @@ -790,26 +790,18 @@ nvf0_grctx_pack_tpc[] = { }; static const struct nvc0_graph_init nvf0_grctx_init_ppc_0[] = { { 0x41be24, 1, 0x04, 0x00000006 }, nvf0_grctx_init_cbm_0[] = { { 0x41bec0, 1, 0x04, 0x10000000 }, { 0x41bec4, 1, 0x04, 0x00037f7f }, { 0x41bee4, 1, 0x04, 0x00000000 }, { 0x41bf00, 1, 0x04, 0x0a418820 }, { 0x41bf04, 1, 0x04, 0x062080e6 }, { 0x41bf08, 1, 0x04, 0x020398a4 }, { 0x41bf0c, 1, 0x04, 0x0e629062 }, { 0x41bf10, 1, 0x04, 0x0a418820 }, { 0x41bf14, 1, 0x04, 0x000000e6 }, { 0x41bfd0, 1, 0x04, 0x00900103 }, { 0x41bfe0, 1, 0x04, 0x00400001 }, { 0x41bfe4, 1, 0x04, 0x00000000 }, {} }; static const struct nvc0_graph_pack nvf0_grctx_pack_ppc[] = { { nvf0_grctx_init_ppc_0 }, { nve4_grctx_init_pes_0 }, { nvf0_grctx_init_cbm_0 }, { nvd7_grctx_init_wwdx_0 }, {} }; Loading