Unverified Commit 88c73852 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'memory-controller-drv-mediatek-5.18' of... 

Merge tag 'memory-controller-drv-mediatek-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers

Memory controller drivers for v5.18 - Mediatek SoC

1. Several updates in the MTK SMI bindings.
2. Add support for MT8186 MTK SMI and improvements in support for MT8195.

* tag 'memory-controller-drv-mediatek-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: mtk-smi: Enable sleep ctrl safety function for MT8195
  memory: mtk-smi: mt8186: Add smi support
  memory: mtk-smi: Add sleep ctrl function
  memory: mtk-smi: handle positive return value for clk_bulk_prepare_enable
  dt-bindings: memory: mediatek: Add mt8186 support
  dt-bindings: memory: mtk-smi: Correct minItems to 2 for the gals clocks
  dt-bindings: memory: mtk-smi: No need mediatek,larb-id for mt8167
  dt-bindings: memory: mtk-smi: Rename clock to clocks

Link: https://lore.kernel.org/r/20220228164313.52931-2-krzysztof.kozlowski@canonical.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b903f9c5 12fbfd66

Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml

+15 −17
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ description: | 
  MediaTek SMI have two generations of HW architecture, here is the list

  which generation the SoCs use:

  generation 1: mt2701 and mt7623.

  generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8192 and mt8195.

  generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8192 and mt8195.



  There's slight differences between the two SMI, for generation 2, the

  register which control the iommu port is at each larb's register base. But
@@ -35,6 +35,7 @@ properties: 
          - mediatek,mt8167-smi-common

          - mediatek,mt8173-smi-common

          - mediatek,mt8183-smi-common

          - mediatek,mt8186-smi-common

          - mediatek,mt8192-smi-common

          - mediatek,mt8195-smi-common-vdo

          - mediatek,mt8195-smi-common-vpp
@@ -88,8 +89,7 @@ allOf: 
              - mediatek,mt2701-smi-common

    then:

      properties:

        clock:

          items:

        clocks:

          minItems: 3

          maxItems: 3

        clock-names:
@@ -108,8 +108,7 @@ allOf: 
      required:

        - mediatek,smi

      properties:

        clock:

          items:

        clocks:

          minItems: 3

          maxItems: 3

        clock-names:
@@ -127,14 +126,14 @@ allOf: 
          enum:

            - mediatek,mt6779-smi-common

            - mediatek,mt8183-smi-common

            - mediatek,mt8186-smi-common

            - mediatek,mt8192-smi-common

            - mediatek,mt8195-smi-common-vdo

            - mediatek,mt8195-smi-common-vpp



    then:

      properties:

        clock:

          items:

        clocks:

          minItems: 4

          maxItems: 4

        clock-names:
@@ -146,8 +145,7 @@ allOf: 


    else:  # for gen2 HW that don't have gals

      properties:

        clock:

          items:

        clocks:

          minItems: 2

          maxItems: 2

        clock-names:

Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml

+10 −9
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ properties: 
          - mediatek,mt8167-smi-larb

          - mediatek,mt8173-smi-larb

          - mediatek,mt8183-smi-larb

          - mediatek,mt8186-smi-larb

          - mediatek,mt8192-smi-larb

          - mediatek,mt8195-smi-larb
@@ -75,15 +76,16 @@ allOf: 
        compatible:

          enum:

            - mediatek,mt8183-smi-larb

            - mediatek,mt8186-smi-larb

            - mediatek,mt8195-smi-larb



    then:

      properties:

        clock:

          items:

            minItems: 3

        clocks:

          minItems: 2

          maxItems: 3

        clock-names:

          minItems: 2

          items:

            - const: apb

            - const: smi
@@ -91,8 +93,7 @@ allOf: 


    else:

      properties:

        clock:

          items:

        clocks:

          minItems: 2

          maxItems: 2

        clock-names:
@@ -108,7 +109,7 @@ allOf: 
              - mediatek,mt2701-smi-larb

              - mediatek,mt2712-smi-larb

              - mediatek,mt6779-smi-larb

              - mediatek,mt8167-smi-larb

              - mediatek,mt8186-smi-larb

              - mediatek,mt8192-smi-larb

              - mediatek,mt8195-smi-larb

drivers/memory/mtk-smi.c

+52 −2
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <linux/device.h>

#include <linux/err.h>

#include <linux/io.h>

#include <linux/iopoll.h>

#include <linux/module.h>

#include <linux/of.h>

#include <linux/of_platform.h>
@@ -32,6 +33,10 @@ 
#define SMI_DUMMY			0x444



/* SMI LARB */

#define SMI_LARB_SLP_CON                0xc

#define SLP_PROT_EN                     BIT(0)

#define SLP_PROT_RDY                    BIT(16)



#define SMI_LARB_CMD_THRT_CON		0x24

#define SMI_LARB_THRT_RD_NU_LMT_MSK	GENMASK(7, 4)

#define SMI_LARB_THRT_RD_NU_LMT		(5 << 4)
@@ -81,6 +86,7 @@ 


#define MTK_SMI_FLAG_THRT_UPDATE	BIT(0)

#define MTK_SMI_FLAG_SW_FLAG		BIT(1)

#define MTK_SMI_FLAG_SLEEP_CTL		BIT(2)

#define MTK_SMI_CAPS(flags, _x)		(!!((flags) & (_x)))



struct mtk_smi_reg_pair {
@@ -348,13 +354,19 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8183 = { 
				      /* IPU0 | IPU1 | CCU */

};



static const struct mtk_smi_larb_gen mtk_smi_larb_mt8186 = {

	.config_port                = mtk_smi_larb_config_port_gen2_general,

	.flags_general	            = MTK_SMI_FLAG_SLEEP_CTL,

};



static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = {

	.config_port                = mtk_smi_larb_config_port_gen2_general,

};



static const struct mtk_smi_larb_gen mtk_smi_larb_mt8195 = {

	.config_port                = mtk_smi_larb_config_port_gen2_general,

	.flags_general	            = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG,

	.flags_general	            = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG |

				      MTK_SMI_FLAG_SLEEP_CTL,

	.ostd		            = mtk_smi_larb_mt8195_ostd,

};
@@ -365,11 +377,32 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = { 
	{.compatible = "mediatek,mt8167-smi-larb", .data = &mtk_smi_larb_mt8167},

	{.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},

	{.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},

	{.compatible = "mediatek,mt8186-smi-larb", .data = &mtk_smi_larb_mt8186},

	{.compatible = "mediatek,mt8192-smi-larb", .data = &mtk_smi_larb_mt8192},

	{.compatible = "mediatek,mt8195-smi-larb", .data = &mtk_smi_larb_mt8195},

	{}

};



static int mtk_smi_larb_sleep_ctrl_enable(struct mtk_smi_larb *larb)

{

	int ret;

	u32 tmp;



	writel_relaxed(SLP_PROT_EN, larb->base + SMI_LARB_SLP_CON);

	ret = readl_poll_timeout_atomic(larb->base + SMI_LARB_SLP_CON,

					tmp, !!(tmp & SLP_PROT_RDY), 10, 1000);

	if (ret) {

		/* TODO: Reset this larb if it fails here. */

		dev_err(larb->smi.dev, "sleep ctrl is not ready(0x%x).\n", tmp);

	}

	return ret;

}



static void mtk_smi_larb_sleep_ctrl_disable(struct mtk_smi_larb *larb)

{

	writel_relaxed(0, larb->base + SMI_LARB_SLP_CON);

}



static int mtk_smi_device_link_common(struct device *dev, struct device **com_dev)

{

	struct platform_device *smi_com_pdev;
@@ -479,9 +512,12 @@ static int __maybe_unused mtk_smi_larb_resume(struct device *dev) 
	int ret;



	ret = clk_bulk_prepare_enable(larb->smi.clk_num, larb->smi.clks);

	if (ret < 0)

	if (ret)

		return ret;



	if (MTK_SMI_CAPS(larb->larb_gen->flags_general, MTK_SMI_FLAG_SLEEP_CTL))

		mtk_smi_larb_sleep_ctrl_disable(larb);



	/* Configure the basic setting for this larb */

	larb_gen->config_port(dev);
@@ -491,6 +527,13 @@ static int __maybe_unused mtk_smi_larb_resume(struct device *dev) 
static int __maybe_unused mtk_smi_larb_suspend(struct device *dev)

{

	struct mtk_smi_larb *larb = dev_get_drvdata(dev);

	int ret;



	if (MTK_SMI_CAPS(larb->larb_gen->flags_general, MTK_SMI_FLAG_SLEEP_CTL)) {

		ret = mtk_smi_larb_sleep_ctrl_enable(larb);

		if (ret)

			return ret;

	}



	clk_bulk_disable_unprepare(larb->smi.clk_num, larb->smi.clks);

	return 0;
@@ -543,6 +586,12 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = { 
		    F_MMU1_LARB(7),

};



static const struct mtk_smi_common_plat mtk_smi_common_mt8186 = {

	.type     = MTK_SMI_GEN2,

	.has_gals = true,

	.bus_sel  = F_MMU1_LARB(1) | F_MMU1_LARB(4) | F_MMU1_LARB(7),

};



static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = {

	.type     = MTK_SMI_GEN2,

	.has_gals = true,
@@ -577,6 +626,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = { 
	{.compatible = "mediatek,mt8167-smi-common", .data = &mtk_smi_common_gen2},

	{.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},

	{.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},

	{.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186},

	{.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192},

	{.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo},

	{.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},