Commit 88574332 authored by Mike Healy's avatar Mike Healy Committed by Herbert Xu
Browse files

crypto: keembay - Add support for Keem Bay OCS AES/SM4



Add support for the AES/SM4 crypto engine included in the Offload and
Crypto Subsystem (OCS) of the Intel Keem Bay SoC, thus enabling
hardware-acceleration for the following transformations:

- ecb(aes), cbc(aes), ctr(aes), cts(cbc(aes)), gcm(aes) and cbc(aes);
  supported for 128-bit and 256-bit keys.

- ecb(sm4), cbc(sm4), ctr(sm4), cts(cbc(sm4)), gcm(sm4) and cbc(sm4);
  supported for 128-bit keys.

The driver passes crypto manager self-tests, including the extra tests
(CRYPTO_MANAGER_EXTRA_TESTS=y).

Signed-off-by: default avatarMike Healy <mikex.healy@intel.com>
Co-developed-by: default avatarDaniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: default avatarDaniele Alessandrelli <daniele.alessandrelli@intel.com>
Acked-by: default avatarMark Gross <mgross@linux.intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent c7e34aa3
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+10 −0
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@@ -8958,6 +8958,16 @@ M: Deepak Saxena <dsaxena@plexity.net>
S:	Maintained
F:	drivers/char/hw_random/ixp4xx-rng.c
INTEL KEEM BAY OCS AES/SM4 CRYPTO DRIVER
M:	Daniele Alessandrelli <daniele.alessandrelli@intel.com>
S:	Maintained
F:	Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml
F:	drivers/crypto/keembay/Kconfig
F:	drivers/crypto/keembay/Makefile
F:	drivers/crypto/keembay/keembay-ocs-aes-core.c
F:	drivers/crypto/keembay/ocs-aes.c
F:	drivers/crypto/keembay/ocs-aes.h
INTEL MANAGEMENT ENGINE (mei)
M:	Tomas Winkler <tomas.winkler@intel.com>
L:	linux-kernel@vger.kernel.org
+2 −0
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@@ -900,4 +900,6 @@ config CRYPTO_DEV_SA2UL
	  used for crypto offload.  Select this if you want to use hardware
	  acceleration for cryptographic algorithms on these devices.

source "drivers/crypto/keembay/Kconfig"

endif # CRYPTO_HW
+1 −0
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@@ -51,3 +51,4 @@ obj-$(CONFIG_CRYPTO_DEV_ARTPEC6) += axis/
obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_AES) += xilinx/
obj-y += hisilicon/
obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/
obj-y += keembay/
+39 −0
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config CRYPTO_DEV_KEEMBAY_OCS_AES_SM4
	tristate "Support for Intel Keem Bay OCS AES/SM4 HW acceleration"
	depends on OF || COMPILE_TEST
	select CRYPTO_SKCIPHER
	select CRYPTO_AEAD
	select CRYPTO_ENGINE
	help
	  Support for Intel Keem Bay Offload and Crypto Subsystem (OCS) AES and
	  SM4 cihper hardware acceleration for use with Crypto API.

	  Provides HW acceleration for the following transformations:
	  cbc(aes), ctr(aes), ccm(aes), gcm(aes), cbc(sm4), ctr(sm4), ccm(sm4)
	  and gcm(sm4).

	  Optionally, support for the following transformations can also be
	  enabled: ecb(aes), cts(cbc(aes)), ecb(sm4) and cts(cbc(sm4)).

config CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB
	bool "Support for Intel Keem Bay OCS AES/SM4 ECB HW acceleration"
	depends on CRYPTO_DEV_KEEMBAY_OCS_AES_SM4
	help
	  Support for Intel Keem Bay Offload and Crypto Subsystem (OCS)
	  AES/SM4 ECB mode hardware acceleration for use with Crypto API.

	  Provides OCS version of ecb(aes) and ecb(sm4)

	  Intel does not recommend use of ECB mode with AES/SM4.

config CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS
	bool "Support for Intel Keem Bay OCS AES/SM4 CTS HW acceleration"
	depends on CRYPTO_DEV_KEEMBAY_OCS_AES_SM4
	help
	  Support for Intel Keem Bay Offload and Crypto Subsystem (OCS)
	  AES/SM4 CBC with CTS mode hardware acceleration for use with
	  Crypto API.

	  Provides OCS version of cts(cbc(aes)) and cts(cbc(sm4)).

	  Intel does not recommend use of CTS mode with AES/SM4.
+5 −0
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#
# Makefile for Intel Keem Bay OCS Crypto API Linux drivers
#
obj-$(CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4) += keembay-ocs-aes.o
keembay-ocs-aes-objs := keembay-ocs-aes-core.o ocs-aes.o
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