Commit 86f9de9d authored by Joey Gouly's avatar Joey Gouly Committed by Catalin Marinas
Browse files

KVM: arm64: Save/restore PIE registers 



Define the new system registers that PIE introduces and context switch them.
The PIE feature is still hidden from the ID register, and not exposed to a VM.

Signed-off-by: default avatarJoey Gouly <joey.gouly@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Oliver Upton <oliver.upton@linux.dev>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230606145859.697944-10-joey.gouly@arm.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent fbff5606

arch/arm64/include/asm/kvm_host.h

+4 −0
Original line number Diff line number Diff line
@@ -340,6 +340,10 @@ enum vcpu_sysreg { 
	TFSR_EL1,	/* Tag Fault Status Register (EL1) */

	TFSRE0_EL1,	/* Tag Fault Status Register (EL0) */



	/* Permission Indirection Extension registers */

	PIR_EL1,       /* Permission Indirection Register 1 (EL1) */

	PIRE0_EL1,     /*  Permission Indirection Register 0 (EL1) */



	/* 32bit specific registers. */

	DACR32_EL2,	/* Domain Access Control Register */

	IFSR32_EL2,	/* Instruction Fault Status Register */

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

+8 −0
Original line number Diff line number Diff line
@@ -55,6 +55,10 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) 
	ctxt_sys_reg(ctxt, CONTEXTIDR_EL1) = read_sysreg_el1(SYS_CONTEXTIDR);

	ctxt_sys_reg(ctxt, AMAIR_EL1)	= read_sysreg_el1(SYS_AMAIR);

	ctxt_sys_reg(ctxt, CNTKCTL_EL1)	= read_sysreg_el1(SYS_CNTKCTL);

	if (cpus_have_final_cap(ARM64_HAS_S1PIE)) {

		ctxt_sys_reg(ctxt, PIR_EL1)	= read_sysreg_el1(SYS_PIR);

		ctxt_sys_reg(ctxt, PIRE0_EL1)	= read_sysreg_el1(SYS_PIRE0);

	}

	ctxt_sys_reg(ctxt, PAR_EL1)	= read_sysreg_par();

	ctxt_sys_reg(ctxt, TPIDR_EL1)	= read_sysreg(tpidr_el1);
@@ -127,6 +131,10 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) 
	write_sysreg_el1(ctxt_sys_reg(ctxt, CONTEXTIDR_EL1), SYS_CONTEXTIDR);

	write_sysreg_el1(ctxt_sys_reg(ctxt, AMAIR_EL1),	SYS_AMAIR);

	write_sysreg_el1(ctxt_sys_reg(ctxt, CNTKCTL_EL1), SYS_CNTKCTL);

	if (cpus_have_final_cap(ARM64_HAS_S1PIE)) {

		write_sysreg_el1(ctxt_sys_reg(ctxt, PIR_EL1),	SYS_PIR);

		write_sysreg_el1(ctxt_sys_reg(ctxt, PIRE0_EL1),	SYS_PIRE0);

	}

	write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1),	par_el1);

	write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1),	tpidr_el1);

arch/arm64/kvm/sys_regs.c

+2 −0
Original line number Diff line number Diff line
@@ -1943,6 +1943,8 @@ static const struct sys_reg_desc sys_reg_descs[] = { 
	{ SYS_DESC(SYS_PMMIR_EL1), trap_raz_wi },



	{ SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 },

	{ SYS_DESC(SYS_PIRE0_EL1), access_vm_reg, reset_unknown, PIRE0_EL1 },

	{ SYS_DESC(SYS_PIR_EL1), access_vm_reg, reset_unknown, PIR_EL1 },

	{ SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 },



	{ SYS_DESC(SYS_LORSA_EL1), trap_loregion },