Commit 86973ae0 authored by Frank Wunderlich's avatar Frank Wunderlich Committed by Heiko Stuebner
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arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro 



Add Nodes to Bananapi-R2-Pro board to support PCIe v3 and
set PCIe related regulators to always on.

Suggested-by: default avatarPeter Geis <pgwipeout@gmail.com>
Signed-off-by: default avatarFrank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220825193836.54262-6-linux@fw-web.de


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent faedfa5b

arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts

+117 −0
Original line number Diff line number Diff line
@@ -86,6 +86,66 @@ 
		vin-supply = <&dc_12v>;

	};



	pcie30_avdd0v9: pcie30-avdd0v9-regulator {

		compatible = "regulator-fixed";

		regulator-name = "pcie30_avdd0v9";

		regulator-always-on;

		regulator-boot-on;

		regulator-min-microvolt = <900000>;

		regulator-max-microvolt = <900000>;

		vin-supply = <&vcc3v3_sys>;

	};



	pcie30_avdd1v8: pcie30-avdd1v8-regulator {

		compatible = "regulator-fixed";

		regulator-name = "pcie30_avdd1v8";

		regulator-always-on;

		regulator-boot-on;

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		vin-supply = <&vcc3v3_sys>;

	};



	/* pi6c pcie clock generator feeds both ports */

	vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v3_pcie";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		enable-active-high;

		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;

		startup-delay-us = <200000>;

		vin-supply = <&vcc5v0_sys>;

	};



	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */

	vcc3v3_minipcie: vcc3v3-minipcie-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v3_minipcie";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		enable-active-high;

		gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&minipcie_enable_h>;

		startup-delay-us = <50000>;

		vin-supply = <&vcc3v3_pi6c_05>;

	};



	/* actually fed by vcc3v3_sys, dependent on pi6c clock generator */

	vcc3v3_ngff: vcc3v3-ngff-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v3_ngff";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		enable-active-high;

		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&ngffpcie_enable_h>;

		startup-delay-us = <50000>;

		vin-supply = <&vcc3v3_pi6c_05>;

	};



	vcc5v0_usb: vcc5v0_usb {

		compatible = "regulator-fixed";

		regulator-name = "vcc5v0_usb";
@@ -513,6 +573,32 @@ 
	};

};



&pcie30phy {

	data-lanes = <1 2>;

	phy-supply = <&vcc3v3_pi6c_05>;

	status = "okay";

};



&pcie3x1 {

	/* M.2 slot */

	num-lanes = <1>;

	pinctrl-names = "default";

	pinctrl-0 = <&ngffpcie_reset_h>;

	reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;

	vpcie3v3-supply = <&vcc3v3_ngff>;

	status = "okay";

};



&pcie3x2 {

	/* mPCIe slot */

	num-lanes = <1>;

	pinctrl-names = "default";

	pinctrl-0 = <&minipcie_reset_h>;

	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;

	vpcie3v3-supply = <&vcc3v3_minipcie>;

	status = "okay";

};



&pinctrl {

	leds {

		blue_led_pin: blue-led-pin {
@@ -529,6 +615,24 @@ 
		};

	};



	pcie {

		minipcie_enable_h: minipcie-enable-h {

			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;

		};



		ngffpcie_enable_h: ngffpcie-enable-h {

			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;

		};



		minipcie_reset_h: minipcie-reset-h {

			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;

		};



		ngffpcie_reset_h: ngffpcie-reset-h {

			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none_drv_level_5>;

		};

	};



	pmic {

		pmic_int: pmic_int {

			rockchip,pins =
@@ -708,6 +812,19 @@ 
	status = "okay";

};



&usb2phy1 {

	/* USB for PCIe/M2 */

	status = "okay";

};



&usb2phy1_host {

	status = "okay";

};



&usb2phy1_otg {

	status = "okay";

};



&vop {

	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;

	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;