Commit 84f293b2 authored by Hou Zhiqiang's avatar Hou Zhiqiang Committed by Lorenzo Pieralisi
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dt-bindings: pci: layerscape-pci: Update the description of SCFG property 

Update the description of the second entry of 'fsl,pcie-scfg' property,
as the LS1043A PCIe controller also has some control registers in SCFG
block, while it has 3 controllers.

Link: https://lore.kernel.org/r/20220311234938.8706-3-leoyang.li@nxp.com


Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
parent 6c389328

Documentation/devicetree/bindings/pci/layerscape-pci.txt

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ Required properties: 
  "intr": The interrupt that is asserted for controller interrupts

- fsl,pcie-scfg: Must include two entries.

  The first entry must be a link to the SCFG device node

  The second entry must be '0' or '1' based on physical PCIe controller index.

  The second entry is the physical PCIe controller index starting from '0'.

  This is used to get SCFG PEXN registers

- dma-coherent: Indicates that the hardware IP block can ensure the coherency

  of the data transferred from/to the IP block. This can avoid the software