Commit 847bea3d authored by Hector Martin's avatar Hector Martin
Browse files

Merge remote-tracking branch 'arm64/for-next/fiq' 



The FIQ support series, already merged into arm64, is a dependency
of the M1 bring-up series and was split off after the first few
versions.

Signed-off-by: default avatarHector Martin <marcan@marcan.st>
parents fd3b2aa1 3889ba70

arch/arm64/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -110,7 +110,6 @@ config ARM64 
	select GENERIC_EARLY_IOREMAP

	select GENERIC_IDLE_POLL_SETUP

	select GENERIC_IRQ_IPI

	select GENERIC_IRQ_MULTI_HANDLER

	select GENERIC_IRQ_PROBE

	select GENERIC_IRQ_SHOW

	select GENERIC_IRQ_SHOW_LEVEL

arch/arm64/include/asm/arch_gicv3.h

+1 −1
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ static inline void gic_pmr_mask_irqs(void) 


static inline void gic_arch_enable_irqs(void)

{

	asm volatile ("msr daifclr, #2" : : : "memory");

	asm volatile ("msr daifclr, #3" : : : "memory");

}



#endif /* __ASSEMBLY__ */

arch/arm64/include/asm/assembler.h

+4 −4
Original line number Diff line number Diff line
@@ -40,9 +40,9 @@ 
	msr	daif, \flags

	.endm



	/* IRQ is the lowest priority flag, unconditionally unmask the rest. */

	.macro enable_da_f

	msr	daifclr, #(8 | 4 | 1)

	/* IRQ/FIQ are the lowest priority flags, unconditionally unmask the rest. */

	.macro enable_da

	msr	daifclr, #(8 | 4)

	.endm



/*
@@ -50,7 +50,7 @@ 
 */

	.macro	save_and_disable_irq, flags

	mrs	\flags, daif

	msr	daifset, #2

	msr	daifset, #3

	.endm



	.macro	restore_irq, flags

arch/arm64/include/asm/daifflags.h

+5 −5
Original line number Diff line number Diff line
@@ -13,8 +13,8 @@ 
#include <asm/ptrace.h>



#define DAIF_PROCCTX		0

#define DAIF_PROCCTX_NOIRQ	PSR_I_BIT

#define DAIF_ERRCTX		(PSR_I_BIT | PSR_A_BIT)

#define DAIF_PROCCTX_NOIRQ	(PSR_I_BIT | PSR_F_BIT)

#define DAIF_ERRCTX		(PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)

#define DAIF_MASK		(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
@@ -47,7 +47,7 @@ static inline unsigned long local_daif_save_flags(void) 
	if (system_uses_irq_prio_masking()) {

		/* If IRQs are masked with PMR, reflect it in the flags */

		if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON)

			flags |= PSR_I_BIT;

			flags |= PSR_I_BIT | PSR_F_BIT;

	}



	return flags;
@@ -69,7 +69,7 @@ static inline void local_daif_restore(unsigned long flags) 
	bool irq_disabled = flags & PSR_I_BIT;



	WARN_ON(system_has_prio_mask_debugging() &&

		!(read_sysreg(daif) & PSR_I_BIT));

		(read_sysreg(daif) & (PSR_I_BIT | PSR_F_BIT)) != (PSR_I_BIT | PSR_F_BIT));



	if (!irq_disabled) {

		trace_hardirqs_on();
@@ -86,7 +86,7 @@ static inline void local_daif_restore(unsigned long flags) 
			 * If interrupts are disabled but we can take

			 * asynchronous errors, we can take NMIs

			 */

			flags &= ~PSR_I_BIT;

			flags &= ~(PSR_I_BIT | PSR_F_BIT);

			pmr = GIC_PRIO_IRQOFF;

		} else {

			pmr = GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET;

arch/arm64/include/asm/irq.h

+4 −0
Original line number Diff line number Diff line
@@ -8,6 +8,10 @@ 


struct pt_regs;



int set_handle_irq(void (*handle_irq)(struct pt_regs *));

#define set_handle_irq	set_handle_irq

int set_handle_fiq(void (*handle_fiq)(struct pt_regs *));



static inline int nr_legacy_irqs(void)

{

	return 0;