Commit 83aeb49c authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Alex Deucher
Browse files

drm/amd/display: Adjust code identation and other minor details 



This commit replaces spaces with tabs in multiple functions and adjusts
the indentation in some other parts of the code to improve readability.

Reviewed-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ef3d74aa

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c

+22 −22
Original line number Diff line number Diff line
@@ -324,7 +324,6 @@ static const struct dcn10_link_enc_shift le_shift = { 


static const struct dcn10_link_enc_mask le_mask = {

	LINK_ENCODER_MASK_SH_LIST_DCN31(_MASK), \



	//DPCS_DCN31_MASK_SH_LIST(_MASK)

};
@@ -2104,6 +2103,7 @@ static bool dcn32_resource_construct( 
	clk_src_regs_init(2, C),

	clk_src_regs_init(3, D),

	clk_src_regs_init(4, E);



#undef REG_STRUCT

#define REG_STRUCT abm_regs

	abm_regs_init(0),

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

+87 −83
Original line number Diff line number Diff line
@@ -1037,8 +1037,8 @@ static void dcn20_adjust_freesync_v_startup( 
	*vstartup_start = ((newVstartup > *vstartup_start) ? newVstartup : *vstartup_start);

}



void dcn20_calculate_dlg_params(

		struct dc *dc, struct dc_state *context,

void dcn20_calculate_dlg_params(struct dc *dc,

				struct dc_state *context,

				display_e2e_pipe_params_st *pipes,

				int pipe_cnt,

				int vlevel)
@@ -1083,6 +1083,7 @@ void dcn20_calculate_dlg_params( 
		pipes[pipe_idx].pipe.dest.vupdate_offset = get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);

		pipes[pipe_idx].pipe.dest.vupdate_width = get_vupdate_width(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);

		pipes[pipe_idx].pipe.dest.vready_offset = get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);



		if (context->res_ctx.pipe_ctx[i].stream->mall_stream_config.type == SUBVP_PHANTOM) {

			// Phantom pipe requires that DET_SIZE = 0 and no unbounded requests

			context->res_ctx.pipe_ctx[i].det_buffer_size_kb = 0;
@@ -1091,6 +1092,7 @@ void dcn20_calculate_dlg_params( 
			context->res_ctx.pipe_ctx[i].det_buffer_size_kb = context->bw_ctx.dml.ip.det_buffer_size_kbytes;

			context->res_ctx.pipe_ctx[i].unbounded_req = pipes[pipe_idx].pipe.src.unbounded_req_mode;

		}



		if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000)

			context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;

		context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz =
@@ -1118,6 +1120,7 @@ void dcn20_calculate_dlg_params( 
		if (!context->res_ctx.pipe_ctx[i].stream)

			continue;



		/* cstate disabled on 201 */

		if (dc->ctx->dce_version == DCN_VERSION_2_01)

			cstate_en = false;
@@ -1201,8 +1204,7 @@ static void swizzle_to_dml_params( 
	}

}



int dcn20_populate_dml_pipes_from_context(

		struct dc *dc,

int dcn20_populate_dml_pipes_from_context(struct dc *dc,

					  struct dc_state *context,

					  display_e2e_pipe_params_st *pipes,

					  bool fast_validate)
@@ -1507,6 +1509,7 @@ int dcn20_populate_dml_pipes_from_context( 
			default:

				break;

			}



			pipes[pipe_cnt].pipe.src.viewport_y_y = scl->viewport.y;

			pipes[pipe_cnt].pipe.src.viewport_y_c = scl->viewport_c.y;

			pipes[pipe_cnt].pipe.src.viewport_x_y = scl->viewport.x;
@@ -1615,8 +1618,7 @@ int dcn20_populate_dml_pipes_from_context( 
	return pipe_cnt;

}



void dcn20_calculate_wm(

		struct dc *dc, struct dc_state *context,

void dcn20_calculate_wm(struct dc *dc, struct dc_state *context,

			display_e2e_pipe_params_st *pipes,

			int *out_pipe_cnt,

			int *pipe_split_from,
@@ -1733,8 +1735,11 @@ void dcn20_calculate_wm( 
	context->bw_ctx.bw.dcn.watermarks.a.frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000;

}



void dcn20_update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st *bb,

		struct pp_smu_nv_clock_table *max_clocks, unsigned int *uclk_states, unsigned int num_states)

void dcn20_update_bounding_box(struct dc *dc,

			       struct _vcs_dpi_soc_bounding_box_st *bb,

			       struct pp_smu_nv_clock_table *max_clocks,

			       unsigned int *uclk_states,

			       unsigned int num_states)

{

	int num_calculated_states = 0;

	int min_dcfclk = 0;
@@ -1796,8 +1801,7 @@ void dcn20_update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_s 
	bb->clock_limits[num_calculated_states].state = bb->num_states;

}



void dcn20_cap_soc_clocks(

		struct _vcs_dpi_soc_bounding_box_st *bb,

void dcn20_cap_soc_clocks(struct _vcs_dpi_soc_bounding_box_st *bb,

			  struct pp_smu_nv_clock_table max_clocks)

{

	int i;