Commit ef3d74aa authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Alex Deucher
Browse files

drm/amd/display: Add missing mclk update 



When using FPO, there is some misconfiguration that happens for the lack
of configuration of the MCLK switch in some circumstances. This commit
adds the required field update when using the MCLK switch.

Reviewed-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 764ba43d

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

+5 −0
Original line number Diff line number Diff line
@@ -1331,6 +1331,11 @@ static void dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context, 
			context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb]

					!= dm_dram_clock_change_unsupported;



	/* Pstate change might not be supported by hardware, but it might be

	 * possible with firmware driven vertical blank stretching.

	 */

	context->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching;



	context->bw_ctx.bw.dcn.clk.dppclk_khz = 0;

	context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(dc, context);

	context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = context->bw_ctx.dml.vba.DTBCLKPerState[vlevel] * 1000;