Commit 82e58e69 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-qcom' and 'clk-microchip' into clk-next 

* clk-qcom: (63 commits)
  clk: qcom: gcc-sc8280xp: Add runtime PM
  clk: qcom: gpucc-sc8280xp: Add runtime PM
  clk: qcom: mmcc-msm8974: fix MDSS_GDSC power flags
  clk: qcom: gpucc-sm6375: Enable runtime pm
  dt-bindings: clock: sm6375-gpucc: Add VDD_GX
  clk: qcom: gcc-sm6115: Add missing PLL config properties
  clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)
  clk: qcom: gcc-ipq6018: remove duplicate initializers
  clk: qcom: gcc-ipq9574: Enable crypto clocks
  dt-bindings: clock: Add crypto clock and reset definitions
  clk: qcom: Add lpass audio clock controller driver for SC8280XP
  clk: qcom: Add lpass clock controller driver for SC8280XP
  dt-bindings: clock: Add LPASS AUDIOCC and reset controller for SC8280XP
  dt-bindings: clock: Add LPASSCC and reset controller for SC8280XP
  dt-bindings: clock: qcom,mmcc: define clocks/clock-names for MSM8226
  clk: qcom: gpucc-sm8550: Add support for graphics clock controller
  clk: qcom: Add support for SM8450 GPUCC
  clk: qcom: gcc-sm8450: Enable hw_clk_ctrl
  clk: qcom: rcg2: Make hw_clk_ctrl toggleable
  dt-bindings: clock: qcom: Add SM8550 graphics clock controller
  ...

* clk-microchip:
  clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id
  clk: at91: sama7g5: switch to parent_hw and parent_data
  clk: at91: sckc: switch to parent_data/parent_hw
  clk: at91: clk-sam9x60-pll: add support for parent_hw
  clk: at91: clk-utmi: add support for parent_hw
  clk: at91: clk-system: add support for parent_hw
  clk: at91: clk-programmable: add support for parent_hw
  clk: at91: clk-peripheral: add support for parent_hw
  clk: at91: clk-master: add support for parent_hw
  clk: at91: clk-generated: add support for parent_hw
  clk: at91: clk-main: add support for parent_data/parent_hw
parents b9a40506 7ed1cefb ff1c6c90

Documentation/devicetree/bindings/clock/qcom,a53pll.yaml

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ properties: 
      - qcom,ipq5332-a53pll

      - qcom,ipq6018-a53pll

      - qcom,ipq8074-a53pll

      - qcom,ipq9574-a73pll

      - qcom,msm8916-a53pll

      - qcom,msm8939-a53pll

Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml

0 → 100644
+73 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Global Clock & Reset Controller on MSM8953



maintainers:

  - Adam Skladowski <a_skl39@protonmail.com>

  - Sireesh Kodali <sireeshkodali@protonmail.com>



description: |

  Qualcomm global clock control module provides the clocks, resets and power

  domains on MSM8953.



  See also: include/dt-bindings/clock/qcom,gcc-msm8953.h



properties:

  compatible:

    const: qcom,gcc-msm8953



  clocks:

    items:

      - description: Board XO source

      - description: Sleep clock source

      - description: Byte clock from DSI PHY0

      - description: Pixel clock from DSI PHY0

      - description: Byte clock from DSI PHY1

      - description: Pixel clock from DSI PHY1



  clock-names:

    items:

      - const: xo

      - const: sleep

      - const: dsi0pll

      - const: dsi0pllbyte

      - const: dsi1pll

      - const: dsi1pllbyte



required:

  - compatible

  - clocks

  - clock-names



allOf:

  - $ref: qcom,gcc.yaml#



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,rpmcc.h>



    clock-controller@1800000 {

        compatible = "qcom,gcc-msm8953";

        reg = <0x01800000 0x80000>;

        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,

                 <&sleep_clk>,

                 <&dsi0_phy 1>,

                 <&dsi0_phy 0>,

                 <&dsi1_phy 1>,

                 <&dsi1_phy 0>;

        clock-names = "xo",

                      "sleep",

                      "dsi0pll",

                      "dsi0pllbyte",

                      "dsi1pll",

                      "dsi1pllbyte";

        #clock-cells = <1>;

        #reset-cells = <1>;

        #power-domain-cells = <1>;

    };

Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml

+0 −1
Original line number Diff line number Diff line
@@ -30,7 +30,6 @@ properties: 
    enum:

      - qcom,gcc-ipq6018

      - qcom,gcc-mdm9607

      - qcom,gcc-msm8953

      - qcom,gcc-mdm9615



required:

Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml

+7 −0
Original line number Diff line number Diff line
@@ -32,6 +32,10 @@ properties: 
      - const: bi_tcxo_ao

      - const: sleep_clk



  power-domains:

    items:

      - description: CX domain



required:

  - compatible

  - clocks
@@ -45,6 +49,8 @@ unevaluatedProperties: false 
examples:

  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    #include <dt-bindings/power/qcom-rpmpd.h>



    clock-controller@100000 {

      compatible = "qcom,gcc-sc7180";

      reg = <0x00100000 0x1f0000>;
@@ -52,6 +58,7 @@ examples: 
               <&rpmhcc RPMH_CXO_CLK_A>,

               <&sleep_clk>;

      clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";

      power-domains = <&rpmhpd SC7180_CX>;

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml

+7 −0
Original line number Diff line number Diff line
@@ -43,6 +43,10 @@ properties: 
      - const: ufs_phy_tx_symbol_0_clk

      - const: usb3_phy_wrapper_gcc_usb30_pipe_clk



  power-domains:

    items:

      - description: CX domain



required:

  - compatible

  - clocks
@@ -56,6 +60,8 @@ unevaluatedProperties: false 
examples:

  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    #include <dt-bindings/power/qcom-rpmpd.h>



    clock-controller@100000 {

      compatible = "qcom,gcc-sc7280";

      reg = <0x00100000 0x1f0000>;
@@ -71,6 +77,7 @@ examples: 
                     "pcie_1_pipe_clk", "ufs_phy_rx_symbol_0_clk",

                     "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk",

                     "usb3_phy_wrapper_gcc_usb30_pipe_clk";

      power-domains = <&rpmhpd SC7280_CX>;

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;