Commit 8243df47 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/pm: update SMU 13.0.0 driver_if header



To fit the latest 78.53 PMFW.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 42900348
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+18 −13
Original line number Diff line number Diff line
@@ -24,12 +24,8 @@
#ifndef SMU13_DRIVER_IF_V13_0_0_H
#define SMU13_DRIVER_IF_V13_0_0_H

// *** IMPORTANT ***
// PMFW TEAM: Always increment the interface version on any change to this file
#define SMU13_DRIVER_IF_VERSION  0x23

//Increment this version if SkuTable_t or BoardTable_t change
#define PPTABLE_VERSION 0x1D
#define PPTABLE_VERSION 0x22

#define NUM_GFXCLK_DPM_LEVELS    16
#define NUM_SOCCLK_DPM_LEVELS    8
@@ -1193,8 +1189,17 @@ typedef struct {
  // SECTION: Advanced Options
  uint32_t          DebugOverrides;

  // Section: Total Board Power idle vs active coefficients
  uint8_t     TotalBoardPowerSupport;
  uint8_t     TotalBoardPowerPadding[3];

  int16_t     TotalIdleBoardPowerM;
  int16_t     TotalIdleBoardPowerB;
  int16_t     TotalBoardPowerM;
  int16_t     TotalBoardPowerB;

  // SECTION: Sku Reserved
  uint32_t         Spare[64];
  uint32_t         Spare[61];

  // Padding for MMHUB - do not modify this
  uint32_t     MmHubPadding[8];
@@ -1259,7 +1264,8 @@ typedef struct {
  // SECTION: Clock Spread Spectrum

  // UCLK Spread Spectrum
  uint16_t     UclkSpreadPadding;
  uint8_t      UclkTrainingModeSpreadPercent;
  uint8_t      UclkSpreadPadding;
  uint16_t     UclkSpreadFreq;      // kHz

  // UCLK Spread Spectrum
@@ -1272,11 +1278,7 @@ typedef struct {

  // Section: Memory Config
  uint8_t      DramWidth; // Width of interface to the channel for each DRAM module. See DRAM_BIT_WIDTH_TYPE_e
  uint8_t      PaddingMem1[3];

  // Section: Total Board Power
  uint16_t     TotalBoardPower;     //Only needed for TCP Estimated case, where TCP = TGP+Total Board Power
  uint16_t     BoardPowerPadding;
  uint8_t      PaddingMem1[7];

  // SECTION: UMC feature flags
  uint8_t      HsrEnabled;
@@ -1376,7 +1378,10 @@ typedef struct {

  uint32_t EnergyAccumulator;
  uint16_t AverageSocketPower;
  uint16_t AverageTotalBoardPower;

  uint16_t AvgTemperature[TEMP_COUNT];
  uint16_t TempPadding;

  uint8_t  PcieRate               ;
  uint8_t  PcieWidth              ;
+1 −1
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@
#define SMU13_DRIVER_IF_VERSION_ALDE 0x08
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_4 0x05
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_5 0x04
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_0 0x2C
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_0 0x2E
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_7 0x2C

#define SMU13_MODE1_RESET_WAIT_TIME_IN_MS 500  //500ms