Commit 822ccfad authored by Tony Luck's avatar Tony Luck Committed by Borislav Petkov
Browse files

x86/cpu: Read/save PPIN MSR during initialization 



Currently, the PPIN (Protected Processor Inventory Number) MSR is read
by every CPU that processes a machine check, CMCI, or just polls machine
check banks from a periodic timer. This is not a "fast" MSR, so this
adds to overhead of processing errors.

Add a new "ppin" field to the cpuinfo_x86 structure. Read and save the
PPIN during initialization. Use this copy in mce_setup() instead of
reading the MSR.

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20220131230111.2004669-4-tony.luck@intel.com
parent 00a2f23e

arch/x86/include/asm/processor.h

+2 −0
Original line number Diff line number Diff line
@@ -119,6 +119,8 @@ struct cpuinfo_x86 { 
	int			x86_cache_mbm_width_offset;

	int			x86_power;

	unsigned long		loops_per_jiffy;

	/* protected processor identification number */

	u64			ppin;

	/* cpuid returned max cores value: */

	u16			x86_max_cores;

	u16			apicid;

arch/x86/kernel/cpu/common.c

+4 −0
Original line number Diff line number Diff line
@@ -91,14 +91,17 @@ DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_l2c_id) = BAD_APICID; 
static struct ppin_info {

	int	feature;

	int	msr_ppin_ctl;

	int	msr_ppin;

} ppin_info[] = {

	[X86_VENDOR_INTEL] = {

		.feature = X86_FEATURE_INTEL_PPIN,

		.msr_ppin_ctl = MSR_PPIN_CTL,

		.msr_ppin = MSR_PPIN

	},

	[X86_VENDOR_AMD] = {

		.feature = X86_FEATURE_AMD_PPIN,

		.msr_ppin_ctl = MSR_AMD_PPIN_CTL,

		.msr_ppin = MSR_AMD_PPIN

	},

};
@@ -153,6 +156,7 @@ static void ppin_init(struct cpuinfo_x86 *c) 


	/* Is the enable bit set? */

	if (val & 2UL) {

		c->ppin = __rdmsr(info->msr_ppin);

		set_cpu_cap(c, info->feature);

		return;

	}

arch/x86/kernel/cpu/mce/core.c

+1 −6
Original line number Diff line number Diff line
@@ -138,12 +138,7 @@ void mce_setup(struct mce *m) 
	m->socketid = cpu_data(m->extcpu).phys_proc_id;

	m->apicid = cpu_data(m->extcpu).initial_apicid;

	m->mcgcap = __rdmsr(MSR_IA32_MCG_CAP);



	if (this_cpu_has(X86_FEATURE_INTEL_PPIN))

		m->ppin = __rdmsr(MSR_PPIN);

	else if (this_cpu_has(X86_FEATURE_AMD_PPIN))

		m->ppin = __rdmsr(MSR_AMD_PPIN);



	m->ppin = cpu_data(m->extcpu).ppin;

	m->microcode = boot_cpu_data.microcode;

}