Commit 80106f73 authored by Dave Jiang's avatar Dave Jiang Committed by Xiaochen Shen
Browse files

dmaengine: idxd: enable SVA feature for IOMMU

mainline inclusion
from mainline-v5.13
commit cf5f86a7
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I596WO


CVE: NA

Intel-SIG: commit cf5f86a7 dmaengine: idxd: enable SVA feature for IOMMU.
Incremental backporting patches for DSA/IAA on Intel Xeon platform.

--------------------------------

Enable IOMMU_DEV_FEAT_SVA before attempt to bind pasid. This is needed
according to iommu_sva_bind_device() comment. Currently Intel IOMMU code
does this before bind call. It really needs to be controlled by the driver.

Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/161894440621.3202472.17644507396206848134.stgit@djiang5-desk3.ch.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarXiaochen Shen <xiaochen.shen@intel.com>
parent 70fb1432
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