Commit 7ef41437 authored by Leo Chen's avatar Leo Chen Committed by Alex Deucher
Browse files

drm/amd/display: Various logs added 



[Why & How]
Added logs for panel delays, spread_spectrum_percentage,
and gpuclk_ss_percentage to facilitate debugging.

Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarWayne Lin <wayne.lin@amd.com>
Signed-off-by: default avatarLeo Chen <sancchen@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fcd3e58f

drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

+40 −14
Original line number Diff line number Diff line
@@ -850,7 +850,7 @@ static enum bp_result get_ss_info_v4_1( 
		if (disp_cntl_tbl->dvi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_DVI: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_DVI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	case AS_SIGNAL_TYPE_HDMI:

		ss_info->spread_spectrum_percentage =
@@ -860,7 +860,7 @@ static enum bp_result get_ss_info_v4_1( 
		if (disp_cntl_tbl->hdmi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	/* TODO LVDS not support anymore? */

	case AS_SIGNAL_TYPE_DISPLAY_PORT:
@@ -871,7 +871,7 @@ static enum bp_result get_ss_info_v4_1( 
		if (disp_cntl_tbl->dp_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	case AS_SIGNAL_TYPE_GPU_PLL:

		/* atom_firmware: DAL only get data from dce_info table.
@@ -885,7 +885,7 @@ static enum bp_result get_ss_info_v4_1( 
				      DATA_TABLES(smu_info));

		if (!smu_info)

			return BP_RESULT_BADBIOSTABLE;



		DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", smu_info->gpuclk_ss_percentage);

		ss_info->spread_spectrum_percentage =

				smu_info->waflclk_ss_percentage;

		ss_info->spread_spectrum_range =
@@ -893,7 +893,7 @@ static enum bp_result get_ss_info_v4_1( 
		if (smu_info->waflclk_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_XGMI: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_XGMI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	default:

		result = BP_RESULT_UNSUPPORTED;
@@ -930,6 +930,7 @@ static enum bp_result get_ss_info_v4_2( 
	if (!smu_info)

		return BP_RESULT_BADBIOSTABLE;



	DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", smu_info->gpuclk_ss_percentage);

	ss_info->type.STEP_AND_DELAY_INFO = false;

	ss_info->spread_percentage_divider = 1000;

	/* BIOS no longer uses target clock.  Always enable for now */
@@ -944,7 +945,7 @@ static enum bp_result get_ss_info_v4_2( 
		if (disp_cntl_tbl->dvi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_DVI: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_DVI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	case AS_SIGNAL_TYPE_HDMI:

		ss_info->spread_spectrum_percentage =
@@ -954,7 +955,7 @@ static enum bp_result get_ss_info_v4_2( 
		if (disp_cntl_tbl->hdmi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	/* TODO LVDS not support anymore? */

	case AS_SIGNAL_TYPE_DISPLAY_PORT:
@@ -965,7 +966,7 @@ static enum bp_result get_ss_info_v4_2( 
		if (smu_info->gpuclk_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	case AS_SIGNAL_TYPE_GPU_PLL:

		/* atom_firmware: DAL only get data from dce_info table.
@@ -1015,7 +1016,7 @@ static enum bp_result get_ss_info_v4_5( 
		if (disp_cntl_tbl->dvi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_DVI: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_DVI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	case AS_SIGNAL_TYPE_HDMI:

		ss_info->spread_spectrum_percentage =
@@ -1025,7 +1026,7 @@ static enum bp_result get_ss_info_v4_5( 
		if (disp_cntl_tbl->hdmi_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	case AS_SIGNAL_TYPE_DISPLAY_PORT:

		ss_info->spread_spectrum_percentage =
@@ -1035,7 +1036,7 @@ static enum bp_result get_ss_info_v4_5( 
		if (disp_cntl_tbl->dp_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)

			ss_info->type.CENTER_MODE = true;



		DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT: %d\n", ss_info->spread_spectrum_percentage);

		DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage);

		break;

	case AS_SIGNAL_TYPE_GPU_PLL:

		/* atom_smu_info_v4_0 does not have fields for SS for SMU Display PLL anymore.
@@ -1860,7 +1861,7 @@ static enum bp_result get_firmware_info_v3_2( 
		/* Vega12 */

		smu_info_v3_2 = GET_IMAGE(struct atom_smu_info_v3_2,

							DATA_TABLES(smu_info));



		DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", smu_info_v3_2->gpuclk_ss_percentage);

		if (!smu_info_v3_2)

			return BP_RESULT_BADBIOSTABLE;
@@ -1869,7 +1870,7 @@ static enum bp_result get_firmware_info_v3_2( 
		/* Vega20 */

		smu_info_v3_3 = GET_IMAGE(struct atom_smu_info_v3_3,

							DATA_TABLES(smu_info));



		DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", smu_info_v3_3->gpuclk_ss_percentage);

		if (!smu_info_v3_3)

			return BP_RESULT_BADBIOSTABLE;
@@ -2011,7 +2012,7 @@ static enum bp_result get_firmware_info_v3_4( 


			if (!smu_info_v3_5)

				return BP_RESULT_BADBIOSTABLE;



			DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", smu_info_v3_5->gpuclk_ss_percentage);

			info->default_engine_clk = smu_info_v3_5->bootup_dcefclk_10khz * 10;

			break;
@@ -2417,6 +2418,7 @@ static enum bp_result get_integrated_info_v11( 
	info_v11 = GET_IMAGE(struct atom_integrated_system_info_v1_11,

					DATA_TABLES(integratedsysteminfo));



	DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", info_v11->gpuclk_ss_percentage);

	if (info_v11 == NULL)

		return BP_RESULT_BADBIOSTABLE;
@@ -2631,6 +2633,7 @@ static enum bp_result get_integrated_info_v2_1( 


	info_v2_1 = GET_IMAGE(struct atom_integrated_system_info_v2_1,

					DATA_TABLES(integratedsysteminfo));

	DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", info_v2_1->gpuclk_ss_percentage);



	if (info_v2_1 == NULL)

		return BP_RESULT_BADBIOSTABLE;
@@ -2792,6 +2795,8 @@ static enum bp_result get_integrated_info_v2_2( 
	info_v2_2 = GET_IMAGE(struct atom_integrated_system_info_v2_2,

					DATA_TABLES(integratedsysteminfo));



	DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", info_v2_2->gpuclk_ss_percentage);



	if (info_v2_2 == NULL)

		return BP_RESULT_BADBIOSTABLE;
@@ -2943,6 +2948,27 @@ static enum bp_result construct_integrated_info( 
		default:

			return result;

		}

		if (result == BP_RESULT_OK) {



			DC_LOG_BIOS("edp1:\n"

						"\tedp_pwr_on_off_delay = %d\n"

						"\tedp_pwr_on_vary_bl_to_blon = %d\n"

						"\tedp_pwr_down_bloff_to_vary_bloff = %d\n"

						"\tedp_bootup_bl_level = %d\n",

						info->edp1_info.edp_pwr_on_off_delay,

						info->edp1_info.edp_pwr_on_vary_bl_to_blon,

						info->edp1_info.edp_pwr_down_bloff_to_vary_bloff,

						info->edp1_info.edp_bootup_bl_level);

			DC_LOG_BIOS("edp2:\n"

						"\tedp_pwr_on_off_delayv = %d\n"

						"\tedp_pwr_on_vary_bl_to_blon = %d\n"

						"\tedp_pwr_down_bloff_to_vary_bloff = %d\n"

						"\tedp_bootup_bl_level = %d\n",

						info->edp2_info.edp_pwr_on_off_delay,

						info->edp2_info.edp_pwr_on_vary_bl_to_blon,

						info->edp2_info.edp_pwr_down_bloff_to_vary_bloff,

						info->edp2_info.edp_bootup_bl_level);

		}

	}



	if (result != BP_RESULT_OK)