Commit 7e113d01 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'iommu-updates-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu 

Pull iommu updates from Joerg Roedel:

 - Intel IOMMU Updates fro Lu Baolu:
     - Dump DMAR translation structure when DMA fault occurs
     - An optimization in the page table manipulation code
     - Use second level for GPA->HPA translation
     - Various cleanups

 - Arm SMMU Updates from Will
     - Minor optimisations to SMMUv3 command creation and submission
     - Numerous new compatible string for Qualcomm SMMUv2 implementations

 - Fixes for the SWIOTLB based implemenation of dma-iommu code for
   untrusted devices

 - Add support for r8a779a0 to the Renesas IOMMU driver and DT matching
   code for r8a77980

 - A couple of cleanups and fixes for the Apple DART IOMMU driver

 - Make use of generic report_iommu_fault() interface in the AMD IOMMU
   driver

 - Various smaller fixes and cleanups

* tag 'iommu-updates-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (35 commits)
  iommu/dma: Fix incorrect error return on iommu deferred attach
  iommu/dart: Initialize DART_STREAMS_ENABLE
  iommu/dma: Use kvcalloc() instead of kvzalloc()
  iommu/tegra-smmu: Use devm_bitmap_zalloc when applicable
  iommu/dart: Use kmemdup instead of kzalloc and memcpy
  iommu/vt-d: Avoid duplicate removing in __domain_mapping()
  iommu/vt-d: Convert the return type of first_pte_in_page to bool
  iommu/vt-d: Clean up unused PASID updating functions
  iommu/vt-d: Delete dev_has_feat callback
  iommu/vt-d: Use second level for GPA->HPA translation
  iommu/vt-d: Check FL and SL capability sanity in scalable mode
  iommu/vt-d: Remove duplicate identity domain flag
  iommu/vt-d: Dump DMAR translation structure when DMA fault occurs
  iommu/vt-d: Do not falsely log intel_iommu is unsupported kernel option
  iommu/arm-smmu-qcom: Request direct mapping for modem device
  iommu: arm-smmu-qcom: Add compatible for QCM2290
  dt-bindings: arm-smmu: Add compatible for QCM2290 SoC
  iommu/arm-smmu-qcom: Add SM6350 SMMU compatible
  dt-bindings: arm-smmu: Add compatible for SM6350 SoC
  iommu/arm-smmu-v3: Properly handle the return value of arm_smmu_cmdq_build_cmd()
  ...
parents abfecb39 52d96919

Documentation/devicetree/bindings/iommu/arm,smmu.yaml

+2 −0
Original line number Diff line number Diff line
@@ -33,10 +33,12 @@ properties: 
      - description: Qcom SoCs implementing "arm,mmu-500"

        items:

          - enum:

              - qcom,qcm2290-smmu-500

              - qcom,sc7180-smmu-500

              - qcom,sc7280-smmu-500

              - qcom,sc8180x-smmu-500

              - qcom,sdm845-smmu-500

              - qcom,sm6350-smmu-500

              - qcom,sm8150-smmu-500

              - qcom,sm8250-smmu-500

              - qcom,sm8350-smmu-500

Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ properties: 
              - renesas,ipmmu-r8a77980 # R-Car V3H

              - renesas,ipmmu-r8a77990 # R-Car E3

              - renesas,ipmmu-r8a77995 # R-Car D3

              - renesas,ipmmu-r8a779a0 # R-Car V3U



  reg:

    maxItems: 1

arch/x86/include/asm/fpu/api.h

+0 −2
Original line number Diff line number Diff line
@@ -108,8 +108,6 @@ extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name); 
 */

#define PASID_DISABLED	0



static inline void update_pasid(void) { }



/* Trap handling */

extern int  fpu__exception_code(struct fpu *fpu, int trap_nr);

extern void fpu_sync_fpstate(struct fpu *fpu);

drivers/iommu/amd/amd_iommu_types.h

+2 −0
Original line number Diff line number Diff line
@@ -138,6 +138,8 @@ 
#define EVENT_DOMID_MASK_HI	0xf0000

#define EVENT_FLAGS_MASK	0xfff

#define EVENT_FLAGS_SHIFT	0x10

#define EVENT_FLAG_RW		0x020

#define EVENT_FLAG_I		0x008



/* feature control bits */

#define CONTROL_IOMMU_EN        0x00ULL

drivers/iommu/amd/iommu.c

+21 −0
Original line number Diff line number Diff line
@@ -474,6 +474,12 @@ static void amd_iommu_report_rmp_fault(volatile u32 *event) 
		pci_dev_put(pdev);

}



#define IS_IOMMU_MEM_TRANSACTION(flags)		\

	(((flags) & EVENT_FLAG_I) == 0)



#define IS_WRITE_REQUEST(flags)			\

	((flags) & EVENT_FLAG_RW)



static void amd_iommu_report_page_fault(u16 devid, u16 domain_id,

					u64 address, int flags)

{
@@ -486,6 +492,20 @@ static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, 
		dev_data = dev_iommu_priv_get(&pdev->dev);



	if (dev_data) {

		/*

		 * If this is a DMA fault (for which the I(nterrupt)

		 * bit will be unset), allow report_iommu_fault() to

		 * prevent logging it.

		 */

		if (IS_IOMMU_MEM_TRANSACTION(flags)) {

			if (!report_iommu_fault(&dev_data->domain->domain,

						&pdev->dev, address,

						IS_WRITE_REQUEST(flags) ?

							IOMMU_FAULT_WRITE :

							IOMMU_FAULT_READ))

				goto out;

		}



		if (__ratelimit(&dev_data->rs)) {

			pci_err(pdev, "Event logged [IO_PAGE_FAULT domain=0x%04x address=0x%llx flags=0x%04x]\n",

				domain_id, address, flags);
@@ -496,6 +516,7 @@ static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, 
			domain_id, address, flags);

	}



out:

	if (pdev)

		pci_dev_put(pdev);

}