Loading Documentation/devicetree/bindings/iommu/arm,smmu.yaml +2 −0 Original line number Diff line number Diff line Loading @@ -33,10 +33,12 @@ properties: - description: Qcom SoCs implementing "arm,mmu-500" items: - enum: - qcom,qcm2290-smmu-500 - qcom,sc7180-smmu-500 - qcom,sc7280-smmu-500 - qcom,sc8180x-smmu-500 - qcom,sdm845-smmu-500 - qcom,sm6350-smmu-500 - qcom,sm8150-smmu-500 - qcom,sm8250-smmu-500 - qcom,sm8350-smmu-500 Loading Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ properties: - renesas,ipmmu-r8a77980 # R-Car V3H - renesas,ipmmu-r8a77990 # R-Car E3 - renesas,ipmmu-r8a77995 # R-Car D3 - renesas,ipmmu-r8a779a0 # R-Car V3U reg: maxItems: 1 Loading arch/x86/include/asm/fpu/api.h +0 −2 Original line number Diff line number Diff line Loading @@ -106,6 +106,4 @@ extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name); */ #define PASID_DISABLED 0 static inline void update_pasid(void) { } #endif /* _ASM_X86_FPU_API_H */ drivers/iommu/amd/amd_iommu_types.h +2 −0 Original line number Diff line number Diff line Loading @@ -138,6 +138,8 @@ #define EVENT_DOMID_MASK_HI 0xf0000 #define EVENT_FLAGS_MASK 0xfff #define EVENT_FLAGS_SHIFT 0x10 #define EVENT_FLAG_RW 0x020 #define EVENT_FLAG_I 0x008 /* feature control bits */ #define CONTROL_IOMMU_EN 0x00ULL Loading drivers/iommu/amd/iommu.c +21 −0 Original line number Diff line number Diff line Loading @@ -473,6 +473,12 @@ static void amd_iommu_report_rmp_fault(volatile u32 *event) pci_dev_put(pdev); } #define IS_IOMMU_MEM_TRANSACTION(flags) \ (((flags) & EVENT_FLAG_I) == 0) #define IS_WRITE_REQUEST(flags) \ ((flags) & EVENT_FLAG_RW) static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, u64 address, int flags) { Loading @@ -485,6 +491,20 @@ static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, dev_data = dev_iommu_priv_get(&pdev->dev); if (dev_data) { /* * If this is a DMA fault (for which the I(nterrupt) * bit will be unset), allow report_iommu_fault() to * prevent logging it. */ if (IS_IOMMU_MEM_TRANSACTION(flags)) { if (!report_iommu_fault(&dev_data->domain->domain, &pdev->dev, address, IS_WRITE_REQUEST(flags) ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) goto out; } if (__ratelimit(&dev_data->rs)) { pci_err(pdev, "Event logged [IO_PAGE_FAULT domain=0x%04x address=0x%llx flags=0x%04x]\n", domain_id, address, flags); Loading @@ -495,6 +515,7 @@ static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, domain_id, address, flags); } out: if (pdev) pci_dev_put(pdev); } Loading Loading
Documentation/devicetree/bindings/iommu/arm,smmu.yaml +2 −0 Original line number Diff line number Diff line Loading @@ -33,10 +33,12 @@ properties: - description: Qcom SoCs implementing "arm,mmu-500" items: - enum: - qcom,qcm2290-smmu-500 - qcom,sc7180-smmu-500 - qcom,sc7280-smmu-500 - qcom,sc8180x-smmu-500 - qcom,sdm845-smmu-500 - qcom,sm6350-smmu-500 - qcom,sm8150-smmu-500 - qcom,sm8250-smmu-500 - qcom,sm8350-smmu-500 Loading
Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ properties: - renesas,ipmmu-r8a77980 # R-Car V3H - renesas,ipmmu-r8a77990 # R-Car E3 - renesas,ipmmu-r8a77995 # R-Car D3 - renesas,ipmmu-r8a779a0 # R-Car V3U reg: maxItems: 1 Loading
arch/x86/include/asm/fpu/api.h +0 −2 Original line number Diff line number Diff line Loading @@ -106,6 +106,4 @@ extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name); */ #define PASID_DISABLED 0 static inline void update_pasid(void) { } #endif /* _ASM_X86_FPU_API_H */
drivers/iommu/amd/amd_iommu_types.h +2 −0 Original line number Diff line number Diff line Loading @@ -138,6 +138,8 @@ #define EVENT_DOMID_MASK_HI 0xf0000 #define EVENT_FLAGS_MASK 0xfff #define EVENT_FLAGS_SHIFT 0x10 #define EVENT_FLAG_RW 0x020 #define EVENT_FLAG_I 0x008 /* feature control bits */ #define CONTROL_IOMMU_EN 0x00ULL Loading
drivers/iommu/amd/iommu.c +21 −0 Original line number Diff line number Diff line Loading @@ -473,6 +473,12 @@ static void amd_iommu_report_rmp_fault(volatile u32 *event) pci_dev_put(pdev); } #define IS_IOMMU_MEM_TRANSACTION(flags) \ (((flags) & EVENT_FLAG_I) == 0) #define IS_WRITE_REQUEST(flags) \ ((flags) & EVENT_FLAG_RW) static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, u64 address, int flags) { Loading @@ -485,6 +491,20 @@ static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, dev_data = dev_iommu_priv_get(&pdev->dev); if (dev_data) { /* * If this is a DMA fault (for which the I(nterrupt) * bit will be unset), allow report_iommu_fault() to * prevent logging it. */ if (IS_IOMMU_MEM_TRANSACTION(flags)) { if (!report_iommu_fault(&dev_data->domain->domain, &pdev->dev, address, IS_WRITE_REQUEST(flags) ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) goto out; } if (__ratelimit(&dev_data->rs)) { pci_err(pdev, "Event logged [IO_PAGE_FAULT domain=0x%04x address=0x%llx flags=0x%04x]\n", domain_id, address, flags); Loading @@ -495,6 +515,7 @@ static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, domain_id, address, flags); } out: if (pdev) pci_dev_put(pdev); } Loading