Commit 7cac5ffc authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'qcom-pinctrl-6.2' of... 

Merge tag 'qcom-pinctrl-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel

Qualcomm pinctrl Devicetree bindings changes for v6.2

Big set of refactoring and improving Qualcomm pin controller bindings:
1. Convert several bindings from TXT to DT schema format: MDM9615,
   MSM8974, MSM8994, MSM8996, MSM8998, SC7180, SDM630, SDM845, SM8150.

2. Refactor existing DT schema bindings to be consistent and similar to
   each other, remove unneeded pieces (provided by common bindings) and
   unify the style.

2. Fix matching of the existing DT schema bindings, so they properly
   validate the DTS.  When looking for pin configuration (children
   nodes), be specific and expect "state" or "pins" suffixes (depending
   on the nesting.  This allows the schema later to properly parse also
   GPIO hogs, although it is not yet implemented.  The changes require
   aligning the DTS to new layout, but it does not break any
   compatibility.
parents 417c3260 1b6b54ef

Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml

+44 −69
Original line number Diff line number Diff line
@@ -7,11 +7,10 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 
title: Qualcomm Technologies, Inc. IPQ6018 TLMM block



maintainers:

  - Sricharan R <sricharan@codeaurora.org>

  - Bjorn Andersson <andersson@kernel.org>



description: |

  This binding describes the Top Level Mode Multiplexer block found in the

  IPQ6018 platform.

description:

  Top Level Mode Multiplexer pin controller in Qualcomm IPQ6018 SoC.



properties:

  compatible:
@@ -20,36 +19,28 @@ properties: 
  reg:

    maxItems: 1



  interrupts:

    description: Specifies the TLMM summary IRQ

    maxItems: 1



  interrupts: true

  interrupt-controller: true



  '#interrupt-cells':

    description:

      Specifies the PIN numbers and Flags, as defined in defined in

      include/dt-bindings/interrupt-controller/irq.h

    const: 2



  "#interrupt-cells": true

  gpio-controller: true

  "#gpio-cells": true

  gpio-ranges: true



  '#gpio-cells':

    description: Specifying the pin number and flags, as defined in

      include/dt-bindings/gpio/gpio.h

    const: 2



  gpio-ranges:

    maxItems: 1



#PIN CONFIGURATION NODES

patternProperties:

  '-pinmux$':

    type: object

  "-state$":

    oneOf:

      - $ref: "#/$defs/qcom-ipq6018-tlmm-state"

      - patternProperties:

          "-pins$":

            $ref: "#/$defs/qcom-ipq6018-tlmm-state"

        additionalProperties: false



$defs:

  qcom-ipq6018-tlmm-state:

    description:

      Pinctrl node's client devices use subnodes for desired pin configuration.

      Client device subnodes use below standard properties.

    $ref: "/schemas/pinctrl/pincfg-node.yaml"

    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state



    properties:

      pins:
@@ -63,7 +54,7 @@ patternProperties: 
                      sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,

                      qdsd_data3 ]

        minItems: 1

        maxItems: 4

        maxItems: 16



      function:

        description:
@@ -72,12 +63,12 @@ patternProperties: 
        enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,

                atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,

                atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,

                atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp1_i2c,

                blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp6_i2c, blsp1_spi,

                atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp0_i2c, blsp1_i2c,

                blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp0_spi, blsp1_spi,

                blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,

                blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,

                blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,

                blsp6_spi, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,

                blsp0_uart, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,

                cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,

                cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,

                dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass,
@@ -92,44 +83,28 @@ patternProperties: 
                qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,

                qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,

                qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,

                qdss_tracedata_a, qdss_tracedata_b, reset_n, sd_card, sd_write,

                sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3,

                uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]



      drive-strength:

        enum: [2, 4, 6, 8, 10, 12, 14, 16]

        default: 2

        description:

          Selects the drive strength for the specified pins, in mA.

                qdss_tracedata_a, qdss_tracedata_b, qpic_pad, reset_n, sd_card,

                sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2,

                uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]



      bias-pull-down: true



      bias-pull-up: true



      bias-disable: true



      drive-strength: true

      output-high: true



      output-low: true



    required:

      - pins

      - function



    additionalProperties: false



allOf:

  - $ref: "pinctrl.yaml#"

  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - '#interrupt-cells'

  - gpio-controller

  - '#gpio-cells'

  - gpio-ranges



additionalProperties: false
@@ -146,7 +121,7 @@ examples: 
        #gpio-cells = <2>;

        gpio-ranges = <&tlmm 0 0 80>;



              serial3-pinmux {

        serial3-state {

            pins = "gpio44", "gpio45";

            function = "blsp2_uart";

            drive-strength = <8>;

Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml→Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml

+19 −22
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9607-pinctrl.yaml#

$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9607-tlmm.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Technologies, Inc. MDM9607 TLMM block
@@ -9,12 +9,10 @@ title: Qualcomm Technologies, Inc. MDM9607 TLMM block 
maintainers:

  - Konrad Dybcio <konrad.dybcio@somainline.org>



description: |

  This binding describes the Top Level Mode Multiplexer block found in the

  MDM9607 platform.

description:

  Top Level Mode Multiplexer pin controller in Qualcomm MDM9607 SoC.



allOf:

  - $ref: "pinctrl.yaml#"

  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#



properties:
@@ -26,10 +24,10 @@ properties: 


  interrupts: true

  interrupt-controller: true

  '#interrupt-cells': true

  "#interrupt-cells": true

  gpio-controller: true

  gpio-reserved-ranges: true

  '#gpio-cells': true

  "#gpio-cells": true

  gpio-ranges: true

  wakeup-parent: true
@@ -40,20 +38,20 @@ required: 
additionalProperties: false



patternProperties:

  '-state$':

  "-state$":

    oneOf:

      - $ref: "#/$defs/qcom-mdm9607-tlmm-state"

      - patternProperties:

          ".*":

            $ref: "#/$defs/qcom-mdm9607-tlmm-state"



'$defs':

$defs:

  qcom-mdm9607-tlmm-state:

    type: object

    description:

      Pinctrl node's client devices use subnodes for desired pin configuration.

      Client device subnodes use below standard properties.

    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"

    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state



    properties:

      pins:
@@ -115,7 +113,6 @@ patternProperties: 


    required:

      - pins

      - function



    additionalProperties: false

Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt

deleted100644 → 0
+0 −161
Original line number Diff line number Diff line 
Qualcomm MDM9615 TLMM block



This binding describes the Top Level Mode Multiplexer block found in the

MDM9615 platform.



- compatible:

	Usage: required

	Value type: <string>

	Definition: must be "qcom,mdm9615-pinctrl"



- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: the base address and size of the TLMM register space.



- interrupts:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: should specify the TLMM summary IRQ.



- interrupt-controller:

	Usage: required

	Value type: <none>

	Definition: identifies this node as an interrupt controller



- #interrupt-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 2. Specifying the pin number and flags, as defined

		    in <dt-bindings/interrupt-controller/irq.h>



- gpio-controller:

	Usage: required

	Value type: <none>

	Definition: identifies this node as a gpio controller



- #gpio-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 2. Specifying the pin number and flags, as defined

		    in <dt-bindings/gpio/gpio.h>



- gpio-ranges:

	Usage: required

	Definition:  see ../gpio/gpio.txt



- gpio-reserved-ranges:

	Usage: optional

	Definition: see ../gpio/gpio.txt



Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for

a general description of GPIO and interrupt bindings.



Please refer to pinctrl-bindings.txt in this directory for details of the

common pinctrl bindings used by client devices, including the meaning of the

phrase "pin configuration node".



The pin configuration nodes act as a container for an arbitrary number of

subnodes. Each of these subnodes represents some desired configuration for a

pin, a group, or a list of pins or groups. This configuration can include the

mux function to select on those pin(s)/group(s), and various pin configuration

parameters, such as pull-up, drive strength, etc.





PIN CONFIGURATION NODES:



The name of each subnode is not important; all subnodes should be enumerated

and processed purely based on their content.



Each subnode only affects those parameters that are explicitly listed. In

other words, a subnode that lists a mux function but no pin configuration

parameters implies no information about any pin configuration parameters.

Similarly, a pin subnode that describes a pullup parameter implies no

information about e.g. the mux function.





The following generic properties as defined in pinctrl-bindings.txt are valid

to specify in a pin configuration subnode:



- pins:

	Usage: required

	Value type: <string-array>

	Definition: List of gpio pins affected by the properties specified in

		    this subnode.  Valid pins are:

		    gpio0-gpio87



- function:

	Usage: required

	Value type: <string>

	Definition: Specify the alternative function to be configured for the

		    specified pins.

		    Valid values are:

		    gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,

		    sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,

		    cdc_mclk



- bias-disable:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configured as no pull.



- bias-pull-down:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configured as pull down.



- bias-pull-up:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configured as pull up.



- output-high:

	Usage: optional

	Value type: <none>

	Definition: The specified pins are configured in output mode, driven

		    high.



- output-low:

	Usage: optional

	Value type: <none>

	Definition: The specified pins are configured in output mode, driven

		    low.



- drive-strength:

	Usage: optional

	Value type: <u32>

	Definition: Selects the drive strength for the specified pins, in mA.

		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16



Example:



	msmgpio: pinctrl@800000 {

		compatible = "qcom,mdm9615-pinctrl";

		reg = <0x800000 0x4000>;



		gpio-controller;

		#gpio-cells = <2>;

		gpio-ranges = <&msmgpio 0 0 88>;

		interrupt-controller;

		#interrupt-cells = <2>;

		interrupts = <0 16 0x4>;



		gsbi8_uart: gsbi8-uart {

			mux {

				pins = "gpio34", "gpio35";

				function = "gsbi8";

			};



			tx {

				pins = "gpio34";

				drive-strength = <4>;

				bias-disable;

			};



			rx {

				pins = "gpio35";

				drive-strength = <2>;

				bias-pull-up;

			};

		};

	};

Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml

0 → 100644
+119 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Technologies, Inc. MDM9615 TLMM block



maintainers:

  - Bjorn Andersson <andersson@kernel.org>



description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC.



$ref: /schemas/pinctrl/qcom,tlmm-common.yaml#



properties:

  compatible:

    const: qcom,mdm9615-pinctrl



  reg:

    maxItems: 1



  interrupts: true

  interrupt-controller: true

  '#interrupt-cells': true

  gpio-controller: true

  '#gpio-cells': true

  gpio-ranges: true



required:

  - compatible

  - reg



additionalProperties: false



patternProperties:

  "-state$":

    oneOf:

      - $ref: "#/$defs/qcom-mdm9615-pinctrl-state"

      - patternProperties:

          "-pins$":

            $ref: "#/$defs/qcom-mdm9615-pinctrl-state"

        additionalProperties: false



$defs:

  qcom-mdm9615-pinctrl-state:

    type: object

    description:

      Pinctrl node's client devices use subnodes for desired pin configuration.

      Client device subnodes use below standard properties.

    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state



    properties:

      pins:

        description:

          List of gpio pins affected by the properties specified in this

          subnode.

        items:

          pattern: "^gpio([0-9]|[1-7][0-9]|8[0-7])$"

        minItems: 1

        maxItems: 16



      function:

        description:

          Specify the alternative function to be configured for the specified

          pins.



        enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,

                sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ]



      bias-disable: true

      bias-pull-down: true

      bias-pull-up: true

      drive-strength: true

      output-high: true

      output-low: true

      input-enable: true



    required:

      - pins



    additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    tlmm: pinctrl@1000000 {

      compatible = "qcom,mdm9615-pinctrl";

      reg = <0x01000000 0x300000>;

      interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;

      gpio-controller;

      gpio-ranges = <&msmgpio 0 0 88>;

      #gpio-cells = <2>;

      interrupt-controller;

      #interrupt-cells = <2>;



      gsbi3-state {

        pins = "gpio8", "gpio9", "gpio10", "gpio11";

        function = "gsbi3";

        drive-strength = <8>;

        bias-disable;

      };



      gsbi5-i2c-state {

        sda-pins {

          pins = "gpio16";

          function = "gsbi5_i2c";

          drive-strength = <8>;

          bias-disable;

        };



        scl-pins {

          pins = "gpio17";

          function = "gsbi5_i2c";

          drive-strength = <2>;

          bias-disable;

        };

      };

    };

Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml

+41 −62
Original line number Diff line number Diff line
@@ -9,9 +9,8 @@ title: Qualcomm Technologies, Inc. MSM8226 TLMM block 
maintainers:

  - Bjorn Andersson <bjorn.andersson@linaro.org>



description: |

  This binding describes the Top Level Mode Multiplexer block found in the

  MSM8226 platform.

description:

  Top Level Mode Multiplexer pin controller in Qualcomm MSM8226 SoC.



properties:

  compatible:
@@ -21,38 +20,32 @@ properties: 
    description: Specifies the base address and size of the TLMM register space

    maxItems: 1



  interrupts:

    description: Specifies the TLMM summary IRQ

    maxItems: 1



  interrupts: true

  interrupt-controller: true



  '#interrupt-cells':

    description: Specifies the PIN numbers and Flags, as defined in

      include/dt-bindings/interrupt-controller/irq.h

    const: 2



  "#interrupt-cells": true

  gpio-controller: true



  '#gpio-cells':

    description: Specifying the pin number and flags, as defined in

      include/dt-bindings/gpio/gpio.h

    const: 2



  gpio-ranges:

    maxItems: 1

  "#gpio-cells": true

  gpio-ranges: true



  gpio-reserved-ranges:

    maxItems: 1



#PIN CONFIGURATION NODES

patternProperties:

  '-pins$':

  "-state$":

    oneOf:

      - $ref: "#/$defs/qcom-msm8226-tlmm-state"

      - patternProperties:

          "-pins$":

            $ref: "#/$defs/qcom-msm8226-tlmm-state"

        additionalProperties: false



$defs:

  qcom-msm8226-tlmm-state:

    type: object

    description:

      Pinctrl node's client devices use subnodes for desired pin configuration.

      Client device subnodes use below standard properties.

    $ref: "/schemas/pinctrl/pincfg-node.yaml"

    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state



    properties:

      pins:
@@ -71,44 +64,30 @@ patternProperties: 
          Specify the alternative function to be configured for the specified

          pins. Functions are only valid for gpio pins.

        enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,

                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1,

                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_spi1,

                blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,

                blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]



      drive-strength:

        enum: [2, 4, 6, 8, 10, 12, 14, 16]

        default: 2

        description:

          Selects the drive strength for the specified pins, in mA.

                blsp_uart3, blsp_uart4, blsp_uart5, cam_mclk0, cam_mclk1, sdc3,

                wlan ]



      bias-pull-down: true



      bias-pull-up: true



      bias-disable: true



      drive-strength: true

      input-enable: true

      output-high: true



      output-low: true



    required:

      - pins

      - function



    additionalProperties: false



allOf:

  - $ref: "pinctrl.yaml#"

  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - '#interrupt-cells'

  - gpio-controller

  - '#gpio-cells'

  - gpio-ranges



additionalProperties: false
@@ -126,7 +105,7 @@ examples: 
        #interrupt-cells = <2>;

        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;



                serial-pins {

        serial-state {

            pins = "gpio8", "gpio9";

            function = "blsp_uart3";

            drive-strength = <8>;