Commit 7c596f9e authored by Xinghai Cen's avatar Xinghai Cen Committed by Chengchang Tang
Browse files

Revert "RDMA/hns: Fix an AEQE overflow error caused by untimely update of eq_db_ci" 

driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/IB8NKF



----------------------------------------------------------------------

This reverts commit fb3989b0.

Signed-off-by: default avatarXinghai Cen <cenxinghai@h-partners.com>
parent a3174445

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+24 −44
Original line number Diff line number Diff line
@@ -6708,10 +6708,11 @@ static int hns_roce_v2_query_mpt(struct hns_roce_dev *hr_dev, u32 key, 
	return ret;

}



static void dump_aeqe_log(struct hns_roce_work *irq_work)

static void hns_roce_irq_work_handle(struct work_struct *work)

{

	struct hns_roce_dev *hr_dev = irq_work->hr_dev;

	struct ib_device *ibdev = &hr_dev->ib_dev;

	struct hns_roce_work *irq_work =

				container_of(work, struct hns_roce_work, work);

	struct ib_device *ibdev = &irq_work->hr_dev->ib_dev;



	switch (irq_work->event_type) {

	case HNS_ROCE_EVENT_TYPE_PATH_MIG:
@@ -6755,8 +6756,6 @@ static void dump_aeqe_log(struct hns_roce_work *irq_work) 
	case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW:

		ibdev_warn(ibdev, "DB overflow.\n");

		break;

	case HNS_ROCE_EVENT_TYPE_MB:

		break;

	case HNS_ROCE_EVENT_TYPE_FLR:

		ibdev_warn(ibdev, "Function level reset.\n");

		break;
@@ -6766,43 +6765,10 @@ static void dump_aeqe_log(struct hns_roce_work *irq_work) 
	case HNS_ROCE_EVENT_TYPE_INVALID_XRCETH:

		ibdev_err(ibdev, "invalid xrceth error.\n");

		break;

	default:

		ibdev_info(ibdev, "Undefined event %d.\n",

			   irq_work->event_type);

		break;

	}

}



static void hns_roce_irq_work_handle(struct work_struct *work)

{

	struct hns_roce_work *irq_work =

				container_of(work, struct hns_roce_work, work);

	struct hns_roce_dev *hr_dev = irq_work->hr_dev;

	int event_type = irq_work->event_type;

	u32 queue_num = irq_work->queue_num;



	switch (event_type) {

	case HNS_ROCE_EVENT_TYPE_PATH_MIG:

	case HNS_ROCE_EVENT_TYPE_PATH_MIG_FAILED:

	case HNS_ROCE_EVENT_TYPE_COMM_EST:

	case HNS_ROCE_EVENT_TYPE_SQ_DRAINED:

	case HNS_ROCE_EVENT_TYPE_SRQ_LAST_WQE_REACH:

		hns_roce_qp_event(hr_dev, queue_num, event_type);

		break;

	case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:

	case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR:

		hns_roce_srq_event(hr_dev, queue_num, event_type);

		break;

	case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR:

	case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW:

		hns_roce_cq_event(hr_dev, queue_num, event_type);

		break;

	default:

		break;

	}



	dump_aeqe_log(irq_work);



	kfree(irq_work);

}
@@ -6862,14 +6828,14 @@ static struct hns_roce_aeqe *next_aeqe_sw_v2(struct hns_roce_eq *eq) 
static irqreturn_t hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev,

				       struct hns_roce_eq *eq)

{

	struct device *dev = hr_dev->dev;

	struct hns_roce_aeqe *aeqe = next_aeqe_sw_v2(eq);

	irqreturn_t aeqe_found = IRQ_NONE;

	int num_aeqes = 0;

	int event_type;

	u32 queue_num;

	int sub_type;



	while (aeqe && num_aeqes < HNS_AEQ_POLLING_BUDGET) {

	while (aeqe) {

		/* Make sure we read AEQ entry after we have checked the

		 * ownership bit

		 */
@@ -6880,20 +6846,38 @@ static irqreturn_t hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev, 
		queue_num = hr_reg_read(aeqe, AEQE_EVENT_QUEUE_NUM);



		switch (event_type) {

		case HNS_ROCE_EVENT_TYPE_PATH_MIG:

		case HNS_ROCE_EVENT_TYPE_PATH_MIG_FAILED:

		case HNS_ROCE_EVENT_TYPE_COMM_EST:

		case HNS_ROCE_EVENT_TYPE_SQ_DRAINED:

		case HNS_ROCE_EVENT_TYPE_WQ_CATAS_ERROR:

		case HNS_ROCE_EVENT_TYPE_SRQ_LAST_WQE_REACH:

		case HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR:

		case HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR:

		case HNS_ROCE_EVENT_TYPE_XRCD_VIOLATION:

		case HNS_ROCE_EVENT_TYPE_INVALID_XRCETH:

			hns_roce_qp_event(hr_dev, queue_num, event_type);

			break;

		case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:

		case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR:

			hns_roce_srq_event(hr_dev, queue_num, event_type);

			break;

		case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR:

		case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW:

			hns_roce_cq_event(hr_dev, queue_num, event_type);

			break;

		case HNS_ROCE_EVENT_TYPE_MB:

			hns_roce_cmd_event(hr_dev,

					le16_to_cpu(aeqe->event.cmd.token),

					aeqe->event.cmd.status,

					le64_to_cpu(aeqe->event.cmd.out_param));

			break;

		case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW:

		case HNS_ROCE_EVENT_TYPE_FLR:

			break;

		default:

			dev_err(dev, "Unhandled event %d on EQ %d at idx %u.\n",

				event_type, eq->eqn, eq->cons_index);

			break;

		}
@@ -6906,7 +6890,6 @@ static irqreturn_t hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev, 
		hns_roce_v2_init_irq_work(hr_dev, eq, queue_num);



		aeqe = next_aeqe_sw_v2(eq);

		++num_aeqes;

	}



	update_eq_db(eq);
@@ -7457,9 +7440,6 @@ static int hns_roce_v2_init_eq_table(struct hns_roce_dev *hr_dev) 
	int ret;

	int i;



	if (hr_dev->caps.aeqe_depth < HNS_AEQ_POLLING_BUDGET)

		return -EINVAL;



	other_num = hr_dev->caps.num_other_vectors;

	comp_num = hr_dev->caps.num_comp_vectors;

	aeq_num = hr_dev->caps.num_aeq_vectors;

drivers/infiniband/hw/hns/hns_roce_hw_v2.h

+0 −5
Original line number Diff line number Diff line
@@ -85,11 +85,6 @@ 


#define HNS_ROCE_V2_TABLE_CHUNK_SIZE		(1 << 18)



/* budget must be smaller than aeqe_depth to guarantee that we update

 * the ci before we polled all the entries in the EQ.

 */

#define HNS_AEQ_POLLING_BUDGET 64



enum {

	HNS_ROCE_CMD_FLAG_IN = BIT(0),

	HNS_ROCE_CMD_FLAG_OUT = BIT(1),