Commit 79ebb537 authored Jun 30, 2023 by Hariprasad Kelam Committed by David S. Miller Jul 02, 2023

octeontx2-af: Add validation before accessing cgx and lmac



with the addition of new MAC blocks like CN10K RPM and CN10KB
RPM_USX, LMACs are noncontiguous and CGX blocks are also
noncontiguous. But during RVU driver initialization, the driver
is assuming they are contiguous and trying to access
cgx or lmac with their id which is resulting in kernel panic.

This patch fixes the issue by adding proper checks.

[   23.219150] pc : cgx_lmac_read+0x38/0x70
[   23.219154] lr : rvu_program_channels+0x3f0/0x498
[   23.223852] sp : ffff000100d6fc80
[   23.227158] x29: ffff000100d6fc80 x28: ffff00010009f880 x27:
000000000000005a
[   23.234288] x26: ffff000102586768 x25: 0000000000002500 x24:
fffffffffff0f000

Fixes: 91c6945e ("octeontx2-af: cn10k: Add RPM MAC support")
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent 2e7bc57b

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -169,6 +169,9 @@ void cgx_lmac_write(int cgx_id, int lmac_id, u64 offset, u64 val)
		{
		struct cgx *cgx_dev = cgx_get_pdata(cgx_id);

		/* Software must not access disabled LMAC registers */
		if (!is_lmac_valid(cgx_dev, lmac_id))
		return;
		cgx_write(cgx_dev, lmac_id, offset, val);
		}

		@@ -176,6 +179,10 @@ u64 cgx_lmac_read(int cgx_id, int lmac_id, u64 offset)
		{
		struct cgx *cgx_dev = cgx_get_pdata(cgx_id);

		/* Software must not access disabled LMAC registers */
		if (!is_lmac_valid(cgx_dev, lmac_id))
		return 0;

		return cgx_read(cgx_dev, lmac_id, offset);
		}