Commit 79a106fc authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2021-05-21-1' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "Usual collection, mostly amdgpu and some i915 regression fixes. I
  nearly managed to hose my build/sign machine this week, but I
  recovered it just in time, and I even got clang12 built.

  dma-buf:
   - WARN fix

  amdgpu:
   - Fix downscaling ratio on DCN3.x
   - Fix for non-4K pages
   - PCO/RV compute hang fix
   - Dongle fix
   - Aldebaran codec query support
   - Refcount leak fix
   - Use after free fix
   - Navi12 golden settings updates
   - GPU reset fixes

  radeon:
   - Fix for imported BO handling

  i915:
   - Pin the L-shape quirked object as unshrinkable to fix crashes
   - Disable HiZ Raw Stall Optimization on broken gen7 to fix glitches,
     gfx corruption
   - GVT: Move mdev attribute groups into kvmgt module to fix kconfig
     deps issue

  exynos:
   - Correct kerneldoc of fimd_shadow_protect_win function
   - Drop redundant error messages"

* tag 'drm-fixes-2021-05-21-1' of git://anongit.freedesktop.org/drm/drm:
  dma-buf: fix unintended pin/unpin warnings
  drm/amdgpu: stop touching sched.ready in the backend
  drm/amd/amdgpu: fix a potential deadlock in gpu reset
  drm/amdgpu: update sdma golden setting for Navi12
  drm/amdgpu: update gc golden setting for Navi12
  drm/amdgpu: Fix a use-after-free
  drm/amdgpu: add video_codecs query support for aldebaran
  drm/amd/amdgpu: fix refcount leak
  drm/amd/display: Disconnect non-DP with no EDID
  drm/amdgpu: disable 3DCGCG on picasso/raven1 to avoid compute hang
  drm/amdgpu: Fix GPU TLB update error when PAGE_SIZE > AMDGPU_PAGE_SIZE
  drm/radeon: use the dummy page for GART if needed
  drm/amd/display: Use the correct max downscaling value for DCN3.x family
  drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7
  drm/i915/gem: Pin the L-shape quirked object as unshrinkable
  drm/exynos/decon5433: Remove redundant error printing in exynos5433_decon_probe()
  drm/exynos: Remove redundant error printing in exynos_dsi_probe()
  drm/exynos: correct exynos_drm_fimd kerneldoc
  drm/i915/gvt: Move mdev attribute groups into kvmgt module
parents ba816d3c dd6ad051

drivers/dma-buf/dma-buf.c

+5 −5
Original line number Diff line number Diff line
@@ -760,7 +760,7 @@ dma_buf_dynamic_attach(struct dma_buf *dmabuf, struct device *dev, 


		if (dma_buf_is_dynamic(attach->dmabuf)) {

			dma_resv_lock(attach->dmabuf->resv, NULL);

			ret = dma_buf_pin(attach);

			ret = dmabuf->ops->pin(attach);

			if (ret)

				goto err_unlock;

		}
@@ -786,7 +786,7 @@ dma_buf_dynamic_attach(struct dma_buf *dmabuf, struct device *dev, 


err_unpin:

	if (dma_buf_is_dynamic(attach->dmabuf))

		dma_buf_unpin(attach);

		dmabuf->ops->unpin(attach);



err_unlock:

	if (dma_buf_is_dynamic(attach->dmabuf))
@@ -843,7 +843,7 @@ void dma_buf_detach(struct dma_buf *dmabuf, struct dma_buf_attachment *attach) 
		__unmap_dma_buf(attach, attach->sgt, attach->dir);



		if (dma_buf_is_dynamic(attach->dmabuf)) {

			dma_buf_unpin(attach);

			dmabuf->ops->unpin(attach);

			dma_resv_unlock(attach->dmabuf->resv);

		}

	}
@@ -956,7 +956,7 @@ struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *attach, 
	if (dma_buf_is_dynamic(attach->dmabuf)) {

		dma_resv_assert_held(attach->dmabuf->resv);

		if (!IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY)) {

			r = dma_buf_pin(attach);

			r = attach->dmabuf->ops->pin(attach);

			if (r)

				return ERR_PTR(r);

		}
@@ -968,7 +968,7 @@ struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *attach, 


	if (IS_ERR(sg_table) && dma_buf_is_dynamic(attach->dmabuf) &&

	     !IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY))

		dma_buf_unpin(attach);

		attach->dmabuf->ops->unpin(attach);



	if (!IS_ERR(sg_table) && attach->dmabuf->ops->cache_sgt_mapping) {

		attach->sgt = sg_table;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+0 −1
Original line number Diff line number Diff line
@@ -4479,7 +4479,6 @@ int amdgpu_do_asic_reset(struct list_head *device_list_handle, 
			r = amdgpu_ib_ring_tests(tmp_adev);

			if (r) {

				dev_err(tmp_adev->dev, "ib ring test failed (%d).\n", r);

				r = amdgpu_device_ip_suspend(tmp_adev);

				need_full_reset = true;

				r = -EAGAIN;

				goto end;

drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c

+3 −0
Original line number Diff line number Diff line
@@ -288,10 +288,13 @@ static int amdgpufb_create(struct drm_fb_helper *helper, 
static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev)

{

	struct amdgpu_framebuffer *rfb = &rfbdev->rfb;

	int i;



	drm_fb_helper_unregister_fbi(&rfbdev->helper);



	if (rfb->base.obj[0]) {

		for (i = 0; i < rfb->base.format->num_planes; i++)

			drm_gem_object_put(rfb->base.obj[0]);

		amdgpufb_destroy_pinned_object(rfb->base.obj[0]);

		rfb->base.obj[0] = NULL;

		drm_framebuffer_unregister_private(&rfb->base);

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

+2 −1
Original line number Diff line number Diff line
@@ -225,7 +225,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo, 
	*addr += mm_cur->start & ~PAGE_MASK;



	num_dw = ALIGN(adev->mman.buffer_funcs->copy_num_dw, 8);

	num_bytes = num_pages * 8;

	num_bytes = num_pages * 8 * AMDGPU_GPU_PAGES_IN_CPU_PAGE;



	r = amdgpu_job_alloc_with_ib(adev, num_dw * 4 + num_bytes,

				     AMDGPU_IB_POOL_DELAYED, &job);
@@ -1210,6 +1210,7 @@ static void amdgpu_ttm_tt_unpopulate(struct ttm_device *bdev, 
	if (gtt && gtt->userptr) {

		amdgpu_ttm_tt_set_user_pages(ttm, NULL);

		kfree(ttm->sg);

		ttm->sg = NULL;

		ttm->page_flags &= ~TTM_PAGE_FLAG_SG;

		return;

	}

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+4 −2
Original line number Diff line number Diff line
@@ -1395,9 +1395,10 @@ static const struct soc15_reg_golden golden_settings_gc_10_1_2[] = 
	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG, 0xffffffff, 0x20000000),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG2, 0xffffffff, 0x00000420),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000200),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x04800000),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x04900000),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DFSM_TILES_IN_FLIGHT, 0x0000ffff, 0x0000003f),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_LAST_OF_BURST_CONFIG, 0xffffffff, 0x03860204),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1800ff, 0x00000044),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff0ffff, 0x00000500),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PRIV_CONTROL, 0x00007fff, 0x000001fe),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),
@@ -1415,12 +1416,13 @@ static const struct soc15_reg_golden golden_settings_gc_10_1_2[] = 
	SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_ENHANCE_2, 0x00000820, 0x00000820),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmRMI_SPARE, 0xffffffff, 0xffff3101),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_CONFIG_CNTL_1, 0x001f0000, 0x00070104),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ALU_CLK_CTRL, 0xffffffff, 0xffffffff),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ARB_CONFIG, 0x00000133, 0x00000130),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_LDS_CLK_CTRL, 0xffffffff, 0xffffffff),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CNTL, 0xffdf80ff, 0x479c0010),

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffffffff, 0x00800000)

	SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0xffffffff, 0x00c00000)

};



static bool gfx_v10_is_rlcg_rw(struct amdgpu_device *adev, u32 offset, uint32_t *flag, bool write)