Commit 77d51337 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MIPS updates from Thomas Bogendoerfer:

 - removed get_fs/set_fs

 - removed broken/unmaintained MIPS KVM trap and emulate support

 - added support for Loongson-2K1000

 - fixes and cleanups

* tag 'mips_5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (107 commits)
  MIPS: BCM63XX: Use BUG_ON instead of condition followed by BUG.
  MIPS: select ARCH_KEEP_MEMBLOCK unconditionally
  mips: Do not include hi and lo in clobber list for R6
  MIPS:DTS:Correct the license for Loongson-2K
  MIPS:DTS:Fix label name and interrupt number of ohci for Loongson-2K
  MIPS: Avoid handcoded DIVU in `__div64_32' altogether
  lib/math/test_div64: Correct the spelling of "dividend"
  lib/math/test_div64: Fix error message formatting
  mips/bootinfo:correct some comments of fw_arg
  MIPS: Avoid DIVU in `__div64_32' is result would be zero
  MIPS: Reinstate platform `__div64_32' handler
  div64: Correct inline documentation for `do_div'
  lib/math: Add a `do_div' test module
  MIPS: Makefile: Replace -pg with CC_FLAGS_FTRACE
  MIPS: pci-legacy: revert "use generic pci_enable_resources"
  MIPS: Loongson64: Add kexec/kdump support
  MIPS: pci-legacy: use generic pci_enable_resources
  MIPS: pci-legacy: remove busn_resource field
  MIPS: pci-legacy: remove redundant info messages
  MIPS: pci-legacy: stop using of_pci_range_to_resource
  ...
parents 3644286f 7e9be673
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+0 −1
Original line number Diff line number Diff line
@@ -47,7 +47,6 @@ examples:

            spi-max-frequency = <3125000>;
            spi-3wire;
            spi-cs-high;

            reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;

+32 −4
Original line number Diff line number Diff line
@@ -10,9 +10,9 @@ maintainers:
  - Jiaxun Yang <jiaxun.yang@flygoat.com>

description: |
  This interrupt controller is found in the Loongson-3 family of chips as the primary
  package interrupt controller which can route local I/O interrupt to interrupt lines
  of cores.
  This interrupt controller is found in the Loongson-3 family of chips and
  Loongson-2K1000 chip, as the primary package interrupt controller which
  can route local I/O interrupt to interrupt lines of cores.

allOf:
  - $ref: /schemas/interrupt-controller.yaml#
@@ -22,9 +22,17 @@ properties:
    oneOf:
      - const: loongson,liointc-1.0
      - const: loongson,liointc-1.0a
      - const: loongson,liointc-2.0

  reg:
    maxItems: 1
    minItems: 1
    maxItems: 3

  reg-names:
    items:
      - const: main
      - const: isr0
      - const: isr1

  interrupt-controller: true

@@ -69,6 +77,26 @@ required:

unevaluatedProperties: false

if:
  properties:
    compatible:
      contains:
        enum:
          - loongson,liointc-2.0

then:
  properties:
    reg:
      minItems: 3

  required:
    - reg-names

else:
  properties:
    reg:
      maxItems: 1

examples:
  - |
    iointc: interrupt-controller@3ff01400 {
+10 −21
Original line number Diff line number Diff line
@@ -4,13 +4,15 @@ config MIPS
	default y
	select ARCH_32BIT_OFF_T if !64BIT
	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
	select ARCH_HAS_FORTIFY_SOURCE
	select ARCH_HAS_KCOV
	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
	select ARCH_HAS_UBSAN_SANITIZE_ALL
	select ARCH_HAS_GCOV_PROFILE_ALL
	select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL
	select ARCH_KEEP_MEMBLOCK
	select ARCH_SUPPORTS_UPROBES
	select ARCH_USE_BUILTIN_BSWAP
	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
@@ -26,6 +28,7 @@ config MIPS
	select GENERIC_ATOMIC64 if !64BIT
	select GENERIC_CMOS_UPDATE
	select GENERIC_CPU_AUTOPROBE
	select GENERIC_FIND_FIRST_BIT
	select GENERIC_GETTIMEOFDAY
	select GENERIC_IOMAP
	select GENERIC_IRQ_PROBE
@@ -91,7 +94,6 @@ config MIPS
	select PERF_USE_VMALLOC
	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
	select RTC_LIB
	select SET_FS
	select SYSCTL_EXCEPTION_TRACE
	select VIRT_TO_BUS
	select ARCH_HAS_ELFCORE_COMPAT
@@ -712,6 +714,7 @@ config SGI_IP27
	select ARC_CMDLINE_ONLY
	select BOOT_ELF64
	select DEFAULT_SGI_PARTITION
	select FORCE_PCI
	select SYS_HAS_EARLY_PRINTK
	select HAVE_PCI
	select IRQ_MIPS_CPU
@@ -774,6 +777,7 @@ config SGI_IP30
	select BOOT_ELF64
	select CEVT_R4K
	select CSRC_R4K
	select FORCE_PCI
	select SYNC_R4K if SMP
	select ZONE_DMA32
	select HAVE_PCI
@@ -998,6 +1002,7 @@ config CAVIUM_OCTEON_SOC
	select NR_CPUS_DEFAULT_64
	select MIPS_NR_CPU_NR_MAP_1024
	select BUILTIN_DTB
	select MTD
	select MTD_COMPLEX_MAPPINGS
	select SWIOTLB
	select SYS_SUPPORTS_RELOCATABLE
@@ -2118,7 +2123,7 @@ config CPU_MIPS32
config CPU_MIPS64
	bool
	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
		     CPU_MIPS64_R6
		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON

#
# These indicate the revision of the architecture
@@ -2185,7 +2190,8 @@ config CPU_SUPPORTS_HUGEPAGES
	depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
config MIPS_PGD_C0_CONTEXT
	bool
	default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
	depends on 64BIT
	default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP

#
# Set to y for ptrace access to watch registers.
@@ -2219,23 +2225,6 @@ config 64BIT

endchoice

config KVM_GUEST
	bool "KVM Guest Kernel"
	depends on CPU_MIPS32_R2
	depends on !64BIT && BROKEN_ON_SMP
	help
	  Select this option if building a guest kernel for KVM (Trap & Emulate)
	  mode.

config KVM_GUEST_TIMER_FREQ
	int "Count/Compare Timer Frequency (MHz)"
	depends on KVM_GUEST
	default 100
	help
	  Set this to non-zero if building a guest kernel for KVM to skip RTC
	  emulation when determining guest CPU Frequency. Instead, the guest's
	  timer frequency is specified directly.

config MIPS_VA_BITS_48
	bool "48 bits virtual memory"
	depends on 64BIT
+1 −0
Original line number Diff line number Diff line
@@ -77,6 +77,7 @@ config CMDLINE_OVERRIDE
config SB1XXX_CORELIS
	bool "Corelis Debugger"
	depends on SIBYTE_SB1xxx_SOC
	select DEBUG_KERNEL if !COMPILE_TEST
	select DEBUG_INFO if !COMPILE_TEST
	help
	  Select compile flags that produce code that can be processed by the
+1 −2
Original line number Diff line number Diff line
@@ -111,7 +111,7 @@ static struct clk_aliastable {
/* access locks to SYS_FREQCTRL0/1 and SYS_CLKSRC registers */
static spinlock_t alchemy_clk_fg0_lock;
static spinlock_t alchemy_clk_fg1_lock;
static spinlock_t alchemy_clk_csrc_lock;
static DEFINE_SPINLOCK(alchemy_clk_csrc_lock);

/* CPU Core clock *****************************************************/

@@ -996,7 +996,6 @@ static int __init alchemy_clk_setup_imux(int ctype)
	if (!a)
		return -ENOMEM;

	spin_lock_init(&alchemy_clk_csrc_lock);
	ret = 0;

	for (i = 0; i < 6; i++) {
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