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Merge Pull Request from: @yunyingsun Content: Some unknown uncore PMON types(like /sys/devices/uncore_type_<x>_<y>) can be found in both SPR(Sapphire Rapids, 4th Gen Xeon) and EMR(Emerald Rapids, 5th Gen Xeon) with HBM or CXL. The unknown PMON types are HBM and CXL PMON. Except for the name, the other information regarding the HBM and CXL PMON counters can be retrieved via the discovery table. Add them into the uncores tables for SPR and EMR. The first 7 patches update the generic support of the discovery table. The last patch enables the HBM and CXL PMON uncore counters for SPR and EMR. Upstream commits from mainline kernel v6.11-rc1: f8a86a9bb5f7 perf/x86/intel/uncore: Support HBM and CXL PMON counters 15a4bd51853b perf/x86/uncore: Cleanup unused unit structure f76a8420444b perf/x86/uncore: Apply the unit control RB tree to PCI uncore units b1d9ea2e1ca4 perf/x86/uncore: Apply the unit control RB tree to MSR uncore units 80580dae65b9 perf/x86/uncore: Apply the unit control RB tree to MMIO uncore units 585463fee642 perf/x86/uncore: Retrieve the unit ID from the unit control RB tree c74443d92f68 perf/x86/uncore: Support per PMU cpumask 0007f3932592 perf/x86/uncore: Save the unit control address of all units Intel-kernel issue: https://gitee.com/openeuler/intel-kernel/issues/IAIFSR Test: Before backport, on SPR or EMR that has HBM or CXL devices, there're "uncore_type_<x>_<y>" devices available under "/sys/devices/". After backport, on SPR or EMR that has HBM or CXL devices, there're "uncore_hbm_x" and/or "uncore_{cxlcm,cxldp}_x" devices under "/sys/devices/" Known issue: N/A Configs: N/A Note: 1. The backported patches have no deviations from the mainline upstream version. 2. The backported patches have been validated on Intel SPR/EMR servers. 3. The patch set only contains CXL/HBM perfmon support for SPR/EMR. Next Xeon Granite Rapids support is not included, and will be supported later with separated patch set. Link:https://gitee.com/openeuler/kernel/pulls/10797 Reviewed-by:Jason Zeng <jason.zeng@intel.com> Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com>
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