Commit 7194dc99 authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/tc: Fix TypeC port init/resume time sanitization 



Atm during driver loading and system resume TypeC ports are accessed
before their HW/SW state is synced. Move the TypeC port sanitization to
the encoder's sync_state hook to fix this.

v2: Handle the encoder disabled case in gen11_dsi_sync_state() as well
    (Jose, Jani)

Fixes: f9e76a6e ("drm/i915: Add an encoder hook to sanitize its state during init/resume")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-1-imre.deak@intel.com
parent 11408ea5

drivers/gpu/drm/i915/display/icl_dsi.c

+8 −2
Original line number Diff line number Diff line
@@ -1599,8 +1599,14 @@ static void gen11_dsi_sync_state(struct intel_encoder *encoder, 
				 const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);

	enum pipe pipe = intel_crtc->pipe;

	struct intel_crtc *intel_crtc;

	enum pipe pipe;



	if (!crtc_state)

		return;



	intel_crtc = to_intel_crtc(crtc_state->uapi.crtc);

	pipe = intel_crtc->pipe;



	/* wa verify 1409054076:icl,jsl,ehl */

	if (DISPLAY_VER(dev_priv) == 11 && pipe == PIPE_B &&

drivers/gpu/drm/i915/display/intel_ddi.c

+7 −1
Original line number Diff line number Diff line
@@ -3838,7 +3838,13 @@ void hsw_ddi_get_config(struct intel_encoder *encoder, 
static void intel_ddi_sync_state(struct intel_encoder *encoder,

				 const struct intel_crtc_state *crtc_state)

{

	if (intel_crtc_has_dp_encoder(crtc_state))

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	enum phy phy = intel_port_to_phy(i915, encoder->port);



	if (intel_phy_is_tc(i915, phy))

		intel_tc_port_sanitize(enc_to_dig_port(encoder));



	if (crtc_state && intel_crtc_has_dp_encoder(crtc_state))

		intel_dp_sync_state(encoder, crtc_state);

}

drivers/gpu/drm/i915/display/intel_display.c

+5 −15
Original line number Diff line number Diff line
@@ -12317,18 +12317,16 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) 
	readout_plane_state(dev_priv);



	for_each_intel_encoder(dev, encoder) {

		struct intel_crtc_state *crtc_state = NULL;



		pipe = 0;



		if (encoder->get_hw_state(encoder, &pipe)) {

			struct intel_crtc_state *crtc_state;



			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

			crtc_state = to_intel_crtc_state(crtc->base.state);



			encoder->base.crtc = &crtc->base;

			intel_encoder_get_config(encoder, crtc_state);

			if (encoder->sync_state)

				encoder->sync_state(encoder, crtc_state);



			/* read out to slave crtc as well for bigjoiner */

			if (crtc_state->bigjoiner) {
@@ -12343,6 +12341,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) 
			encoder->base.crtc = NULL;

		}



		if (encoder->sync_state)

			encoder->sync_state(encoder, crtc_state);



		drm_dbg_kms(&dev_priv->drm,

			    "[ENCODER:%d:%s] hw state readout: %s, pipe %c\n",

			    encoder->base.base.id, encoder->base.name,
@@ -12625,17 +12626,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev, 
	intel_modeset_readout_hw_state(dev);



	/* HW state is read out, now we need to sanitize this mess. */



	/* Sanitize the TypeC port mode upfront, encoders depend on this */

	for_each_intel_encoder(dev, encoder) {

		enum phy phy = intel_port_to_phy(dev_priv, encoder->port);



		/* We need to sanitize only the MST primary port. */

		if (encoder->type != INTEL_OUTPUT_DP_MST &&

		    intel_phy_is_tc(dev_priv, phy))

			intel_tc_port_sanitize(enc_to_dig_port(encoder));

	}



	get_encoder_power_domains(dev_priv);



	if (HAS_PCH_IBX(dev_priv))