Commit 6f7aee27 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'add-support-for-vsc85xx-dt-rgmii-delays' 

Harini Katakam says:

====================
Add support for VSC85xx DT RGMII delays

Provide an option to change RGMII delay value via devicetree.
====================

Link: https://lore.kernel.org/r/20230529122017.10620-1-harini.katakam@amd.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 748b4428 dbb050d2

drivers/net/phy/mscc/mscc.h

+1 −0
Original line number Diff line number Diff line
@@ -292,6 +292,7 @@ enum rgmii_clock_delay { 
#define PHY_ID_VSC8575			  0x000707d0

#define PHY_ID_VSC8582			  0x000707b0

#define PHY_ID_VSC8584			  0x000707c0

#define PHY_VENDOR_MSCC			0x00070400



#define MSCC_VDDMAC_1500		  1500

#define MSCC_VDDMAC_1800		  1800

drivers/net/phy/mscc/mscc_main.c

+30 −21
Original line number Diff line number Diff line
@@ -107,6 +107,9 @@ static const struct vsc8531_edge_rate_table edge_table[] = { 
};

#endif



static const int vsc85xx_internal_delay[] = {200, 800, 1100, 1700, 2000, 2300,

					     2600, 3400};



static int vsc85xx_phy_read_page(struct phy_device *phydev)

{

	return __phy_read(phydev, MSCC_EXT_PAGE_ACCESS);
@@ -525,8 +528,12 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl, 
{

	u16 rgmii_rx_delay_pos = ffs(rgmii_rx_delay_mask) - 1;

	u16 rgmii_tx_delay_pos = ffs(rgmii_tx_delay_mask) - 1;

	int delay_size = ARRAY_SIZE(vsc85xx_internal_delay);

	struct device *dev = &phydev->mdio.dev;

	u16 reg_val = 0;

	u16 mask = 0;

	s32 rx_delay;

	s32 tx_delay;

	int rc = 0;



	/* For traffic to pass, the VSC8502 family needs the RX_CLK disable bit
@@ -541,12 +548,28 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl, 
	if (phy_interface_is_rgmii(phydev))

		mask |= rgmii_rx_delay_mask | rgmii_tx_delay_mask;



	rx_delay = phy_get_internal_delay(phydev, dev, vsc85xx_internal_delay,

					  delay_size, true);

	if (rx_delay < 0) {

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||

		    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)

		reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_rx_delay_pos;

			rx_delay = RGMII_CLK_DELAY_2_0_NS;

		else

			rx_delay = RGMII_CLK_DELAY_0_2_NS;

	}



	tx_delay = phy_get_internal_delay(phydev, dev, vsc85xx_internal_delay,

					  delay_size, false);

	if (tx_delay < 0) {

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||

		    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)

		reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_tx_delay_pos;

			rx_delay = RGMII_CLK_DELAY_2_0_NS;

		else

			rx_delay = RGMII_CLK_DELAY_0_2_NS;

	}



	reg_val |= rx_delay << rgmii_rx_delay_pos;

	reg_val |= tx_delay << rgmii_tx_delay_pos;



	if (mask)

		rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2,
@@ -2678,21 +2701,7 @@ static struct phy_driver vsc85xx_driver[] = { 
module_phy_driver(vsc85xx_driver);



static struct mdio_device_id __maybe_unused vsc85xx_tbl[] = {

	{ PHY_ID_VSC8501, 0xfffffff0, },

	{ PHY_ID_VSC8502, 0xfffffff0, },

	{ PHY_ID_VSC8504, 0xfffffff0, },

	{ PHY_ID_VSC8514, 0xfffffff0, },

	{ PHY_ID_VSC8530, 0xfffffff0, },

	{ PHY_ID_VSC8531, 0xfffffff0, },

	{ PHY_ID_VSC8540, 0xfffffff0, },

	{ PHY_ID_VSC8541, 0xfffffff0, },

	{ PHY_ID_VSC8552, 0xfffffff0, },

	{ PHY_ID_VSC856X, 0xfffffff0, },

	{ PHY_ID_VSC8572, 0xfffffff0, },

	{ PHY_ID_VSC8574, 0xfffffff0, },

	{ PHY_ID_VSC8575, 0xfffffff0, },

	{ PHY_ID_VSC8582, 0xfffffff0, },

	{ PHY_ID_VSC8584, 0xfffffff0, },

	{ PHY_ID_MATCH_VENDOR(PHY_VENDOR_MSCC) },

	{ }

};