Commit 6ed33c13 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'enetc-flow-control' 



Vladimir Oltean says:

====================
Flow control for NXP ENETC

This patch series contains logic for enabling the lossless mode on the
RX rings of the ENETC, and the PAUSE thresholds on the internal FIFO
memory.

During testing it was found that, with the default FIFO configuration,
a sender which isn't persuaded by our PAUSE frames and keeps sending
will cause some MAC RX frame errors. To mitigate this, we need to ensure
that the FIFO never runs completely full, so we need to fix up a setting
that was supposed to be configured well out of reset. Unfortunately this
requires the addition of a new mini-driver.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents c1d9e34e a8648887

Documentation/devicetree/bindings/net/fsl-enetc.txt

+15 −0
Original line number Diff line number Diff line
@@ -102,3 +102,18 @@ Example: 
			full-duplex;

		};

	};



* Integrated Endpoint Register Block bindings



Optionally, the fsl_enetc driver can probe on the Integrated Endpoint Register

Block, which preconfigures the FIFO limits for the ENETC ports. This is a node

with the following properties:



- reg		: Specifies the address in the SoC memory space.

- compatible	: Must be "fsl,ls1028a-enetc-ierb".



Example:

	ierb@1f0800000 {

		compatible = "fsl,ls1028a-enetc-ierb";

		reg = <0x01 0xf0800000 0x0 0x10000>;

	};

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -1116,6 +1116,12 @@ 
			};

		};



		/* Integrated Endpoint Register Block */

		ierb@1f0800000 {

			compatible = "fsl,ls1028a-enetc-ierb";

			reg = <0x01 0xf0800000 0x0 0x10000>;

		};



		rcpm: power-controller@1e34040 {

			compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";

			reg = <0x0 0x1e34040 0x0 0x1c>;

drivers/net/ethernet/freescale/enetc/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
config FSL_ENETC

	tristate "ENETC PF driver"

	depends on PCI && PCI_MSI

	depends on FSL_ENETC_IERB || FSL_ENETC_IERB=n

	select FSL_ENETC_MDIO

	select PHYLINK

	select PCS_LYNX
@@ -25,6 +26,14 @@ config FSL_ENETC_VF 


	  If compiled as module (M), the module name is fsl-enetc-vf.



config FSL_ENETC_IERB

	tristate "ENETC IERB driver"

	help

	  This driver configures the Integrated Endpoint Register Block on NXP

	  LS1028A.



	  If compiled as module (M), the module name is fsl-enetc-ierb.



config FSL_ENETC_MDIO

	tristate "ENETC MDIO driver"

	depends on PCI && MDIO_DEVRES && MDIO_BUS

drivers/net/ethernet/freescale/enetc/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -11,6 +11,9 @@ obj-$(CONFIG_FSL_ENETC_VF) += fsl-enetc-vf.o 
fsl-enetc-vf-y := enetc_vf.o $(common-objs)

fsl-enetc-vf-$(CONFIG_FSL_ENETC_QOS) += enetc_qos.o



obj-$(CONFIG_FSL_ENETC_IERB) += fsl-enetc-ierb.o

fsl-enetc-ierb-y := enetc_ierb.o



obj-$(CONFIG_FSL_ENETC_MDIO) += fsl-enetc-mdio.o

fsl-enetc-mdio-y := enetc_pci_mdio.o enetc_mdio.o

drivers/net/ethernet/freescale/enetc/enetc.h

+16 −0
Original line number Diff line number Diff line
@@ -237,6 +237,22 @@ static inline bool enetc_si_is_pf(struct enetc_si *si) 
	return !!(si->hw.port);

}



static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)

{

	switch (pf_pdev->devfn) {

	case 0:

		return 0;

	case 1:

		return 1;

	case 2:

		return 2;

	case 6:

		return 3;

	default:

		return -1;

	}

}



#define ENETC_MAX_NUM_TXQS	8

#define ENETC_INT_NAME_MAX	(IFNAMSIZ + 8)