Commit 6e73bc90 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch arm64/for-next/sysreg into kvm-arm64/misc-5.15 



Merge the arm64/for-next/sysreg branch to avoid merge conflicts
in -next and upstream.

* arm64/for-next/sysreg:
  arm64/kexec: Test page size support with new TGRAN range values

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents 3134cc8b 79d82cbc

arch/arm64/include/asm/cpufeature.h

+6 −3
Original line number Original line Diff line number Diff line
@@ -657,7 +657,8 @@ static inline bool system_supports_4kb_granule(void) 
	val = cpuid_feature_extract_unsigned_field(mmfr0,

	val = cpuid_feature_extract_unsigned_field(mmfr0,

						ID_AA64MMFR0_TGRAN4_SHIFT);

						ID_AA64MMFR0_TGRAN4_SHIFT);





	return val == ID_AA64MMFR0_TGRAN4_SUPPORTED;

	return (val >= ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN) &&

	       (val <= ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX);

}

}





static inline bool system_supports_64kb_granule(void)

static inline bool system_supports_64kb_granule(void)
@@ -669,7 +670,8 @@ static inline bool system_supports_64kb_granule(void) 
	val = cpuid_feature_extract_unsigned_field(mmfr0,

	val = cpuid_feature_extract_unsigned_field(mmfr0,

						ID_AA64MMFR0_TGRAN64_SHIFT);

						ID_AA64MMFR0_TGRAN64_SHIFT);





	return val == ID_AA64MMFR0_TGRAN64_SUPPORTED;

	return (val >= ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN) &&

	       (val <= ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX);

}

}





static inline bool system_supports_16kb_granule(void)

static inline bool system_supports_16kb_granule(void)
@@ -681,7 +683,8 @@ static inline bool system_supports_16kb_granule(void) 
	val = cpuid_feature_extract_unsigned_field(mmfr0,

	val = cpuid_feature_extract_unsigned_field(mmfr0,

						ID_AA64MMFR0_TGRAN16_SHIFT);

						ID_AA64MMFR0_TGRAN16_SHIFT);





	return val == ID_AA64MMFR0_TGRAN16_SUPPORTED;

	return (val >= ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN) &&

	       (val <= ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX);

}

}





static inline bool system_supports_mixed_endian_el0(void)

static inline bool system_supports_mixed_endian_el0(void)

arch/arm64/include/asm/sysreg.h

+16 −12
Original line number Original line Diff line number Diff line
@@ -848,11 +848,15 @@ 
#define ID_AA64MMFR0_PARANGE_SHIFT	0

#define ID_AA64MMFR0_PARANGE_SHIFT	0





#define ID_AA64MMFR0_TGRAN4_NI			0xf

#define ID_AA64MMFR0_TGRAN4_NI			0xf

#define ID_AA64MMFR0_TGRAN4_SUPPORTED	0x0

#define ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN	0x0

#define ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX	0x7

#define ID_AA64MMFR0_TGRAN64_NI			0xf

#define ID_AA64MMFR0_TGRAN64_NI			0xf

#define ID_AA64MMFR0_TGRAN64_SUPPORTED	0x0

#define ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN	0x0

#define ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX	0x7

#define ID_AA64MMFR0_TGRAN16_NI			0x0

#define ID_AA64MMFR0_TGRAN16_NI			0x0

#define ID_AA64MMFR0_TGRAN16_SUPPORTED	0x1

#define ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN	0x1

#define ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX	0xf



#define ID_AA64MMFR0_PARANGE_32		0x0

#define ID_AA64MMFR0_PARANGE_32		0x0

#define ID_AA64MMFR0_PARANGE_36		0x1

#define ID_AA64MMFR0_PARANGE_36		0x1

#define ID_AA64MMFR0_PARANGE_40		0x2

#define ID_AA64MMFR0_PARANGE_40		0x2
@@ -1035,19 +1039,19 @@ 




#if defined(CONFIG_ARM64_4K_PAGES)

#if defined(CONFIG_ARM64_4K_PAGES)

#define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN4_SHIFT

#define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN4_SHIFT

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	ID_AA64MMFR0_TGRAN4_SUPPORTED_MAX

#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN4_2_SHIFT

#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN4_2_SHIFT

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN4_SUPPORTED

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	0x7

#elif defined(CONFIG_ARM64_16K_PAGES)

#elif defined(CONFIG_ARM64_16K_PAGES)

#define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN16_SHIFT

#define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN16_SHIFT

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN16_SUPPORTED_MIN

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	ID_AA64MMFR0_TGRAN16_SUPPORTED_MAX

#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN16_2_SHIFT

#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN16_2_SHIFT

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN16_SUPPORTED

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	0xF

#elif defined(CONFIG_ARM64_64K_PAGES)

#elif defined(CONFIG_ARM64_64K_PAGES)

#define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN64_SHIFT

#define ID_AA64MMFR0_TGRAN_SHIFT		ID_AA64MMFR0_TGRAN64_SHIFT

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	ID_AA64MMFR0_TGRAN64_SUPPORTED_MAX

#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN64_2_SHIFT

#define ID_AA64MMFR0_TGRAN_2_SHIFT		ID_AA64MMFR0_TGRAN64_2_SHIFT

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MIN	ID_AA64MMFR0_TGRAN64_SUPPORTED

#define ID_AA64MMFR0_TGRAN_SUPPORTED_MAX	0x7

#endif

#endif





#define MVFR2_FPMISC_SHIFT		4

#define MVFR2_FPMISC_SHIFT		4