Commit 6e129176 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/endpoint' 

- Add max-virtual-functions to endpoint binding (Kishon Vijay Abraham I)

- Add pci_epf_add_vepf() API to add virtual function to endpoint (Kishon
  Vijay Abraham I)

- Add pci_epf_vepf_link() to link virtual function to endpoint physical
  function (Kishon Vijay Abraham I)

- Add virtual function number to pci_epc_ops endpoint ops interfaces
  (Kishon Vijay Abraham I)

- Simplify register base address computation for endpoint BAR configuration
  (Kishon Vijay Abraham I)

- Add support to configure virtual functions in cadence endpoint driver
  (Kishon Vijay Abraham I)

- Add SR-IOV configuration to endpoint test driver (Kishon Vijay Abraham I)

- Document configfs usage to create virtual functions for endpoints (Kishon
  Vijay Abraham I)

* remotes/lorenzo/pci/endpoint:
  Documentation: PCI: endpoint/pci-endpoint-cfs: Guide to use SR-IOV
  misc: pci_endpoint_test: Populate sriov_configure ops to configure SR-IOV device
  PCI: cadence: Add support to configure virtual functions
  PCI: cadence: Simplify code to get register base address for configuring BAR
  PCI: endpoint: Add virtual function number in pci_epc ops
  PCI: endpoint: Add support to link a physical function to a virtual function
  PCI: endpoint: Add support to add virtual function in endpoint core
  dt-bindings: PCI: pci-ep: Add binding to specify virtual function
parents eccefc74 0c84f5bf

Documentation/PCI/endpoint/pci-endpoint-cfs.rst

+11 −1
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ entries corresponding to EPF driver will be created by the EPF core. 
		.. <EPF Driver1>/

			... <EPF Device 11>/

			... <EPF Device 21>/

			... <EPF Device 31>/

		.. <EPF Driver2>/

			... <EPF Device 12>/

			... <EPF Device 22>/
@@ -68,6 +69,7 @@ created) 
				... subsys_vendor_id

				... subsys_id

				... interrupt_pin

			        ... <Symlink EPF Device 31>/

                                ... primary/

			                ... <Symlink EPC Device1>/

                                ... secondary/
@@ -79,6 +81,13 @@ interface should be added in 'primary' directory and symlink of endpoint 
controller connected to secondary interface should be added in 'secondary'

directory.



The <EPF Device> directory can have a list of symbolic links

(<Symlink EPF Device 31>) to other <EPF Device>. These symbolic links should

be created by the user to represent the virtual functions that are bound to

the physical function. In the above directory structure <EPF Device 11> is a

physical function and <EPF Device 31> is a virtual function. An EPF device once

it's linked to another EPF device, cannot be linked to a EPC device.



EPC Device

==========
@@ -98,7 +107,8 @@ entries corresponding to EPC device will be created by the EPC core. 


The <EPC Device> directory will have a list of symbolic links to

<EPF Device>. These symbolic links should be created by the user to

represent the functions present in the endpoint device.

represent the functions present in the endpoint device. Only <EPF Device>

that represents a physical function can be linked to a EPC device.



The <EPC Device> directory will also have a *start* field. Once

"1" is written to this field, the endpoint device will be ready to

Documentation/devicetree/bindings/pci/pci-ep.yaml

+7 −0
Original line number Diff line number Diff line
@@ -23,6 +23,13 @@ properties: 
    default: 1

    maximum: 255



  max-virtual-functions:

    description: Array representing the number of virtual functions corresponding to each physical

      function

    $ref: /schemas/types.yaml#/definitions/uint8-array

    minItems: 1

    maxItems: 255



  max-link-speed:

    $ref: /schemas/types.yaml#/definitions/uint32

    enum: [ 1, 2, 3, 4 ]

drivers/misc/pci_endpoint_test.c

+1 −0
Original line number Diff line number Diff line
@@ -986,6 +986,7 @@ static struct pci_driver pci_endpoint_test_driver = { 
	.id_table	= pci_endpoint_test_tbl,

	.probe		= pci_endpoint_test_probe,

	.remove		= pci_endpoint_test_remove,

	.sriov_configure = pci_sriov_configure_simple,

};

module_pci_driver(pci_endpoint_test_driver);

drivers/pci/controller/cadence/pcie-cadence-ep.c

+143 −53
Original line number Diff line number Diff line
@@ -16,11 +16,37 @@ 
#define CDNS_PCIE_EP_IRQ_PCI_ADDR_NONE		0x1

#define CDNS_PCIE_EP_IRQ_PCI_ADDR_LEGACY	0x3



static int cdns_pcie_ep_write_header(struct pci_epc *epc, u8 fn,

static u8 cdns_pcie_get_fn_from_vfn(struct cdns_pcie *pcie, u8 fn, u8 vfn)

{

	u32 cap = CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET;

	u32 first_vf_offset, stride;



	if (vfn == 0)

		return fn;



	first_vf_offset = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_SRIOV_VF_OFFSET);

	stride = cdns_pcie_ep_fn_readw(pcie, fn, cap +  PCI_SRIOV_VF_STRIDE);

	fn = fn + first_vf_offset + ((vfn - 1) * stride);



	return fn;

}



static int cdns_pcie_ep_write_header(struct pci_epc *epc, u8 fn, u8 vfn,

				     struct pci_epf_header *hdr)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	u32 cap = CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET;

	struct cdns_pcie *pcie = &ep->pcie;

	u32 reg;



	if (vfn > 1) {

		dev_err(&epc->dev, "Only Virtual Function #1 has deviceID\n");

		return -EINVAL;

	} else if (vfn == 1) {

		reg = cap + PCI_SRIOV_VF_DID;

		cdns_pcie_ep_fn_writew(pcie, fn, reg, hdr->deviceid);

		return 0;

	}



	cdns_pcie_ep_fn_writew(pcie, fn, PCI_DEVICE_ID, hdr->deviceid);

	cdns_pcie_ep_fn_writeb(pcie, fn, PCI_REVISION_ID, hdr->revid);
@@ -47,7 +73,7 @@ static int cdns_pcie_ep_write_header(struct pci_epc *epc, u8 fn, 
	return 0;

}



static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn,

static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn,

				struct pci_epf_bar *epf_bar)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
@@ -92,32 +118,36 @@ static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, 


	addr0 = lower_32_bits(bar_phys);

	addr1 = upper_32_bits(bar_phys);

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar),

			 addr0);

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar),

			 addr1);



	if (bar < BAR_4) {

		reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn);

		b = bar;

	} else {

		reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn);

		b = bar - BAR_4;

	}

	if (vfn == 1)

		reg = CDNS_PCIE_LM_EP_VFUNC_BAR_CFG(bar, fn);

	else

		reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn);

	b = (bar < BAR_4) ? bar : bar - BAR_4;



	if (vfn == 0 || vfn == 1) {

		cfg = cdns_pcie_readl(pcie, reg);

		cfg &= ~(CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE_MASK(b) |

			 CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_CTRL_MASK(b));

		cfg |= (CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE(b, aperture) |

			CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_CTRL(b, ctrl));

		cdns_pcie_writel(pcie, reg, cfg);

	}



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar),

			 addr0);

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar),

			 addr1);



	if (vfn > 0)

		epf = &epf->epf[vfn - 1];

	epf->epf_bar[bar] = epf_bar;



	return 0;

}



static void cdns_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn,

static void cdns_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn, u8 vfn,

				   struct pci_epf_bar *epf_bar)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
@@ -126,29 +156,32 @@ static void cdns_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn, 
	enum pci_barno bar = epf_bar->barno;

	u32 reg, cfg, b, ctrl;



	if (bar < BAR_4) {

		reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn);

		b = bar;

	} else {

		reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn);

		b = bar - BAR_4;

	}

	if (vfn == 1)

		reg = CDNS_PCIE_LM_EP_VFUNC_BAR_CFG(bar, fn);

	else

		reg = CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn);

	b = (bar < BAR_4) ? bar : bar - BAR_4;



	if (vfn == 0 || vfn == 1) {

		ctrl = CDNS_PCIE_LM_BAR_CFG_CTRL_DISABLED;

		cfg = cdns_pcie_readl(pcie, reg);

		cfg &= ~(CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE_MASK(b) |

			 CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_CTRL_MASK(b));

		cfg |= CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_CTRL(b, ctrl);

		cdns_pcie_writel(pcie, reg, cfg);

	}



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar), 0);

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_IB_EP_FUNC_BAR_ADDR1(fn, bar), 0);



	if (vfn > 0)

		epf = &epf->epf[vfn - 1];

	epf->epf_bar[bar] = NULL;

}



static int cdns_pcie_ep_map_addr(struct pci_epc *epc, u8 fn, phys_addr_t addr,

				 u64 pci_addr, size_t size)

static int cdns_pcie_ep_map_addr(struct pci_epc *epc, u8 fn, u8 vfn,

				 phys_addr_t addr, u64 pci_addr, size_t size)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	struct cdns_pcie *pcie = &ep->pcie;
@@ -161,6 +194,7 @@ static int cdns_pcie_ep_map_addr(struct pci_epc *epc, u8 fn, phys_addr_t addr, 
		return -EINVAL;

	}



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);

	cdns_pcie_set_outbound_region(pcie, 0, fn, r, false, addr, pci_addr, size);



	set_bit(r, &ep->ob_region_map);
@@ -169,7 +203,7 @@ static int cdns_pcie_ep_map_addr(struct pci_epc *epc, u8 fn, phys_addr_t addr, 
	return 0;

}



static void cdns_pcie_ep_unmap_addr(struct pci_epc *epc, u8 fn,

static void cdns_pcie_ep_unmap_addr(struct pci_epc *epc, u8 fn, u8 vfn,

				    phys_addr_t addr)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
@@ -189,13 +223,15 @@ static void cdns_pcie_ep_unmap_addr(struct pci_epc *epc, u8 fn, 
	clear_bit(r, &ep->ob_region_map);

}



static int cdns_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 mmc)

static int cdns_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn, u8 mmc)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	struct cdns_pcie *pcie = &ep->pcie;

	u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;

	u16 flags;



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);



	/*

	 * Set the Multiple Message Capable bitfield into the Message Control

	 * register.
@@ -209,13 +245,15 @@ static int cdns_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 mmc) 
	return 0;

}



static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn)

static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	struct cdns_pcie *pcie = &ep->pcie;

	u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;

	u16 flags, mme;



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);



	/* Validate that the MSI feature is actually enabled. */

	flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS);

	if (!(flags & PCI_MSI_FLAGS_ENABLE))
@@ -230,13 +268,15 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn) 
	return mme;

}



static int cdns_pcie_ep_get_msix(struct pci_epc *epc, u8 func_no)

static int cdns_pcie_ep_get_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	struct cdns_pcie *pcie = &ep->pcie;

	u32 cap = CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET;

	u32 val, reg;



	func_no = cdns_pcie_get_fn_from_vfn(pcie, func_no, vfunc_no);



	reg = cap + PCI_MSIX_FLAGS;

	val = cdns_pcie_ep_fn_readw(pcie, func_no, reg);

	if (!(val & PCI_MSIX_FLAGS_ENABLE))
@@ -247,14 +287,17 @@ static int cdns_pcie_ep_get_msix(struct pci_epc *epc, u8 func_no) 
	return val;

}



static int cdns_pcie_ep_set_msix(struct pci_epc *epc, u8 fn, u16 interrupts,

				 enum pci_barno bir, u32 offset)

static int cdns_pcie_ep_set_msix(struct pci_epc *epc, u8 fn, u8 vfn,

				 u16 interrupts, enum pci_barno bir,

				 u32 offset)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	struct cdns_pcie *pcie = &ep->pcie;

	u32 cap = CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET;

	u32 val, reg;



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);



	reg = cap + PCI_MSIX_FLAGS;

	val = cdns_pcie_ep_fn_readw(pcie, fn, reg);

	val &= ~PCI_MSIX_FLAGS_QSIZE;
@@ -274,8 +317,8 @@ static int cdns_pcie_ep_set_msix(struct pci_epc *epc, u8 fn, u16 interrupts, 
	return 0;

}



static void cdns_pcie_ep_assert_intx(struct cdns_pcie_ep *ep, u8 fn,

				     u8 intx, bool is_asserted)

static void cdns_pcie_ep_assert_intx(struct cdns_pcie_ep *ep, u8 fn, u8 intx,

				     bool is_asserted)

{

	struct cdns_pcie *pcie = &ep->pcie;

	unsigned long flags;
@@ -317,7 +360,8 @@ static void cdns_pcie_ep_assert_intx(struct cdns_pcie_ep *ep, u8 fn, 
	writel(0, ep->irq_cpu_addr + offset);

}



static int cdns_pcie_ep_send_legacy_irq(struct cdns_pcie_ep *ep, u8 fn, u8 intx)

static int cdns_pcie_ep_send_legacy_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,

					u8 intx)

{

	u16 cmd;
@@ -334,7 +378,7 @@ static int cdns_pcie_ep_send_legacy_irq(struct cdns_pcie_ep *ep, u8 fn, u8 intx) 
	return 0;

}



static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn,

static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,

				     u8 interrupt_num)

{

	struct cdns_pcie *pcie = &ep->pcie;
@@ -343,6 +387,8 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, 
	u8 msi_count;

	u64 pci_addr, pci_addr_mask = 0xff;



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);



	/* Check whether the MSI feature has been enabled by the PCI host. */

	flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS);

	if (!(flags & PCI_MSI_FLAGS_ENABLE))
@@ -382,7 +428,7 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, 
	return 0;

}



static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn,

static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, u8 vfn,

				    phys_addr_t addr, u8 interrupt_num,

				    u32 entry_size, u32 *msi_data,

				    u32 *msi_addr_offset)
@@ -396,6 +442,8 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, 
	int ret;

	int i;



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);



	/* Check whether the MSI feature has been enabled by the PCI host. */

	flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS);

	if (!(flags & PCI_MSI_FLAGS_ENABLE))
@@ -419,7 +467,7 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, 
	pci_addr &= GENMASK_ULL(63, 2);



	for (i = 0; i < interrupt_num; i++) {

		ret = cdns_pcie_ep_map_addr(epc, fn, addr,

		ret = cdns_pcie_ep_map_addr(epc, fn, vfn, addr,

					    pci_addr & ~pci_addr_mask,

					    entry_size);

		if (ret)
@@ -433,7 +481,7 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, 
	return 0;

}



static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn,

static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,

				      u16 interrupt_num)

{

	u32 cap = CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET;
@@ -446,6 +494,12 @@ static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, 
	u16 flags;

	u8 bir;



	epf = &ep->epf[fn];

	if (vfn > 0)

		epf = &epf->epf[vfn - 1];



	fn = cdns_pcie_get_fn_from_vfn(pcie, fn, vfn);



	/* Check whether the MSI-X feature has been enabled by the PCI host. */

	flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSIX_FLAGS);

	if (!(flags & PCI_MSIX_FLAGS_ENABLE))
@@ -456,7 +510,6 @@ static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, 
	bir = tbl_offset & PCI_MSIX_TABLE_BIR;

	tbl_offset &= PCI_MSIX_TABLE_OFFSET;



	epf = &ep->epf[fn];

	msix_tbl = epf->epf_bar[bir]->addr + tbl_offset;

	msg_addr = msix_tbl[(interrupt_num - 1)].msg_addr;

	msg_data = msix_tbl[(interrupt_num - 1)].msg_data;
@@ -478,21 +531,27 @@ static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, 
	return 0;

}



static int cdns_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn,

static int cdns_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, u8 vfn,

				  enum pci_epc_irq_type type,

				  u16 interrupt_num)

{

	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	struct cdns_pcie *pcie = &ep->pcie;

	struct device *dev = pcie->dev;



	switch (type) {

	case PCI_EPC_IRQ_LEGACY:

		return cdns_pcie_ep_send_legacy_irq(ep, fn, 0);

		if (vfn > 0) {

			dev_err(dev, "Cannot raise legacy interrupts for VF\n");

			return -EINVAL;

		}

		return cdns_pcie_ep_send_legacy_irq(ep, fn, vfn, 0);



	case PCI_EPC_IRQ_MSI:

		return cdns_pcie_ep_send_msi_irq(ep, fn, interrupt_num);

		return cdns_pcie_ep_send_msi_irq(ep, fn, vfn, interrupt_num);



	case PCI_EPC_IRQ_MSIX:

		return cdns_pcie_ep_send_msix_irq(ep, fn, interrupt_num);

		return cdns_pcie_ep_send_msix_irq(ep, fn, vfn, interrupt_num);



	default:

		break;
@@ -523,6 +582,13 @@ static int cdns_pcie_ep_start(struct pci_epc *epc) 
	return 0;

}



static const struct pci_epc_features cdns_pcie_epc_vf_features = {

	.linkup_notifier = false,

	.msi_capable = true,

	.msix_capable = true,

	.align = 65536,

};



static const struct pci_epc_features cdns_pcie_epc_features = {

	.linkup_notifier = false,

	.msi_capable = true,
@@ -531,9 +597,12 @@ static const struct pci_epc_features cdns_pcie_epc_features = { 
};



static const struct pci_epc_features*

cdns_pcie_ep_get_features(struct pci_epc *epc, u8 func_no)

cdns_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no)

{

	if (!vfunc_no)

		return &cdns_pcie_epc_features;



	return &cdns_pcie_epc_vf_features;

}



static const struct pci_epc_ops cdns_pcie_epc_ops = {
@@ -559,9 +628,11 @@ int cdns_pcie_ep_setup(struct cdns_pcie_ep *ep) 
	struct platform_device *pdev = to_platform_device(dev);

	struct device_node *np = dev->of_node;

	struct cdns_pcie *pcie = &ep->pcie;

	struct cdns_pcie_epf *epf;

	struct resource *res;

	struct pci_epc *epc;

	int ret;

	int i;



	pcie->is_rc = false;
@@ -606,6 +677,25 @@ int cdns_pcie_ep_setup(struct cdns_pcie_ep *ep) 
	if (!ep->epf)

		return -ENOMEM;



	epc->max_vfs = devm_kcalloc(dev, epc->max_functions,

				    sizeof(*epc->max_vfs), GFP_KERNEL);

	if (!epc->max_vfs)

		return -ENOMEM;



	ret = of_property_read_u8_array(np, "max-virtual-functions",

					epc->max_vfs, epc->max_functions);

	if (ret == 0) {

		for (i = 0; i < epc->max_functions; i++) {

			epf = &ep->epf[i];

			if (epc->max_vfs[i] == 0)

				continue;

			epf->epf = devm_kcalloc(dev, epc->max_vfs[i],

						sizeof(*ep->epf), GFP_KERNEL);

			if (!epf->epf)

				return -ENOMEM;

		}

	}



	ret = pci_epc_mem_init(epc, pcie->mem_res->start,

			       resource_size(pcie->mem_res), PAGE_SIZE);

	if (ret < 0) {

drivers/pci/controller/cadence/pcie-cadence.h

+12 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 


#include <linux/kernel.h>

#include <linux/pci.h>

#include <linux/pci-epf.h>

#include <linux/phy/phy.h>



/* Parameters for the waiting for link up routine */
@@ -46,10 +47,18 @@ 
#define  CDNS_PCIE_LM_EP_ID_BUS_SHIFT	8



/* Endpoint Function f BAR b Configuration Registers */

#define CDNS_PCIE_LM_EP_FUNC_BAR_CFG(bar, fn) \

	(((bar) < BAR_4) ? CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) : CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn))

#define CDNS_PCIE_LM_EP_FUNC_BAR_CFG0(fn) \

	(CDNS_PCIE_LM_BASE + 0x0240 + (fn) * 0x0008)

#define CDNS_PCIE_LM_EP_FUNC_BAR_CFG1(fn) \

	(CDNS_PCIE_LM_BASE + 0x0244 + (fn) * 0x0008)

#define CDNS_PCIE_LM_EP_VFUNC_BAR_CFG(bar, fn) \

	(((bar) < BAR_4) ? CDNS_PCIE_LM_EP_VFUNC_BAR_CFG0(fn) : CDNS_PCIE_LM_EP_VFUNC_BAR_CFG1(fn))

#define CDNS_PCIE_LM_EP_VFUNC_BAR_CFG0(fn) \

	(CDNS_PCIE_LM_BASE + 0x0280 + (fn) * 0x0008)

#define CDNS_PCIE_LM_EP_VFUNC_BAR_CFG1(fn) \

	(CDNS_PCIE_LM_BASE + 0x0284 + (fn) * 0x0008)

#define  CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE_MASK(b) \

	(GENMASK(4, 0) << ((b) * 8))

#define  CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_APERTURE(b, a) \
@@ -114,6 +123,7 @@ 


#define CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET	0x90

#define CDNS_PCIE_EP_FUNC_MSIX_CAP_OFFSET	0xb0

#define CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET	0x200



/*

 * Root Port Registers (PCI configuration space for the root port function)
@@ -318,9 +328,11 @@ struct cdns_pcie_rc { 


/**

 * struct cdns_pcie_epf - Structure to hold info about endpoint function

 * @epf: Info about virtual functions attached to the physical function

 * @epf_bar: reference to the pci_epf_bar for the six Base Address Registers

 */

struct cdns_pcie_epf {

	struct cdns_pcie_epf *epf;

	struct pci_epf_bar *epf_bar[PCI_STD_NUM_BARS];

};