Commit eccefc74 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/xilinx-nwl' 

- Document optional clock DT property (Michal Simek)

- Enable PCIe ref clock (Hyun Kwon)

* remotes/lorenzo/pci/xilinx-nwl:
  PCI: xilinx-nwl: Enable the clock through CCF
  dt-bindings: pci: xilinx-nwl: Document optional clock property
parents 09cfc9db de0a01f5

Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ Required properties: 


Optional properties:

- dma-coherent: present if DMA operations are coherent

- clocks: Input clock specifier. Refer to common clock bindings



Example:

++++++++

drivers/pci/controller/pcie-xilinx-nwl.c

+12 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
 * (C) Copyright 2014 - 2015, Xilinx, Inc.

 */



#include <linux/clk.h>

#include <linux/delay.h>

#include <linux/interrupt.h>

#include <linux/irq.h>
@@ -169,6 +170,7 @@ struct nwl_pcie { 
	u8 last_busno;

	struct nwl_msi msi;

	struct irq_domain *legacy_irq_domain;

	struct clk *clk;

	raw_spinlock_t leg_mask_lock;

};
@@ -816,6 +818,16 @@ static int nwl_pcie_probe(struct platform_device *pdev) 
		return err;

	}



	pcie->clk = devm_clk_get(dev, NULL);

	if (IS_ERR(pcie->clk))

		return PTR_ERR(pcie->clk);



	err = clk_prepare_enable(pcie->clk);

	if (err) {

		dev_err(dev, "can't enable PCIe ref clock\n");

		return err;

	}



	err = nwl_pcie_bridge_init(pcie);

	if (err) {

		dev_err(dev, "HW Initialization failed\n");