Commit 6db0c87a authored by Darren Powell's avatar Darren Powell Committed by Alex Deucher
Browse files

amdgpu/pm: Replace hwmgr smu usage of sprintf with sysfs_emit 



 replacing printfs with sysfs_emit
 minor smu7 change to remove compiler warning comparison of int and uint32_t
 minor smu8 change to remove compiler warning comparison of int and uint32_t

=== Test ===
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
LOGFILE=pp_printf.test.log

lspci -nn | grep "VGA\|Display"  > $LOGFILE
FILES="pp_dpm_sclk
pp_power_profile_mode "

for f in $FILES
do
  echo === $f === >> $LOGFILE
  cat $HWMON_DIR/device/$f >> $LOGFILE
done
cat $LOGFILE

Signed-off-by: default avatarDarren Powell <darren.powell@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0b023410

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

+11 −11
Original line number Diff line number Diff line
@@ -1036,13 +1036,13 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr, 
		else

			i = 1;



		size += sprintf(buf + size, "0: %uMhz %s\n",

		size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",

					data->gfx_min_freq_limit/100,

					i == 0 ? "*" : "");

		size += sprintf(buf + size, "1: %uMhz %s\n",

		size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",

					i == 1 ? now : SMU10_UMD_PSTATE_GFXCLK,

					i == 1 ? "*" : "");

		size += sprintf(buf + size, "2: %uMhz %s\n",

		size += sysfs_emit_at(buf, size, "2: %uMhz %s\n",

					data->gfx_max_freq_limit/100,

					i == 2 ? "*" : "");

		break;
@@ -1050,7 +1050,7 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr, 
		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency, &now);



		for (i = 0; i < mclk_table->count; i++)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

			size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",

					i,

					mclk_table->entries[i].clk / 100,

					((mclk_table->entries[i].clk / 100)
@@ -1065,10 +1065,10 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr, 
			if (ret)

				return ret;



			size = sprintf(buf, "%s:\n", "OD_SCLK");

			size += sprintf(buf + size, "0: %10uMhz\n",

			size = sysfs_emit(buf, "%s:\n", "OD_SCLK");

			size += sysfs_emit_at(buf, size, "0: %10uMhz\n",

			(data->gfx_actual_soft_min_freq > 0) ? data->gfx_actual_soft_min_freq : min_freq);

			size += sprintf(buf + size, "1: %10uMhz\n",

			size += sysfs_emit_at(buf, size, "1: %10uMhz\n",

			(data->gfx_actual_soft_max_freq > 0) ? data->gfx_actual_soft_max_freq : max_freq);

		}

		break;
@@ -1081,8 +1081,8 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr, 
			if (ret)

				return ret;



			size = sprintf(buf, "%s:\n", "OD_RANGE");

			size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",

			size = sysfs_emit(buf, "%s:\n", "OD_RANGE");

			size += sysfs_emit_at(buf, size, "SCLK: %7uMHz %10uMHz\n",

				min_freq, max_freq);

		}

		break;
@@ -1456,11 +1456,11 @@ static int smu10_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) 
	if (!buf)

		return -EINVAL;



	size += sprintf(buf + size, "%s %16s %s %s %s %s\n",title[0],

	size += sysfs_emit_at(buf, size, "%s %16s %s %s %s %s\n",title[0],

			title[1], title[2], title[3], title[4], title[5]);



	for (i = 0; i <= PP_SMC_POWER_PROFILE_COMPUTE; i++)

		size += sprintf(buf + size, "%3d %14s%s: %14d %3d %10d %14d\n",

		size += sysfs_emit_at(buf, size, "%3d %14s%s: %14d %3d %10d %14d\n",

			i, profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",

			profile_mode_setting[i][0], profile_mode_setting[i][1],

			profile_mode_setting[i][2], profile_mode_setting[i][3]);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

+19 −19
Original line number Diff line number Diff line
@@ -4896,8 +4896,8 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr, 
	struct smu7_odn_dpm_table *odn_table = &(data->odn_dpm_table);

	struct phm_odn_clock_levels *odn_sclk_table = &(odn_table->odn_core_clock_dpm_levels);

	struct phm_odn_clock_levels *odn_mclk_table = &(odn_table->odn_memory_clock_dpm_levels);

	int i, now, size = 0;

	uint32_t clock, pcie_speed;

	int size = 0;

	uint32_t i, now, clock, pcie_speed;



	switch (type) {

	case PP_SCLK:
@@ -4911,7 +4911,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr, 
		now = i;



		for (i = 0; i < sclk_table->count; i++)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

			size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",

					i, sclk_table->dpm_levels[i].value / 100,

					(i == now) ? "*" : "");

		break;
@@ -4926,7 +4926,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr, 
		now = i;



		for (i = 0; i < mclk_table->count; i++)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

			size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",

					i, mclk_table->dpm_levels[i].value / 100,

					(i == now) ? "*" : "");

		break;
@@ -4940,7 +4940,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr, 
		now = i;



		for (i = 0; i < pcie_table->count; i++)

			size += sprintf(buf + size, "%d: %s %s\n", i,

			size += sysfs_emit_at(buf, size, "%d: %s %s\n", i,

					(pcie_table->dpm_levels[i].value == 0) ? "2.5GT/s, x8" :

					(pcie_table->dpm_levels[i].value == 1) ? "5.0GT/s, x16" :

					(pcie_table->dpm_levels[i].value == 2) ? "8.0GT/s, x16" : "",
@@ -4948,32 +4948,32 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr, 
		break;

	case OD_SCLK:

		if (hwmgr->od_enabled) {

			size = sprintf(buf, "%s:\n", "OD_SCLK");

			size = sysfs_emit(buf, "%s:\n", "OD_SCLK");

			for (i = 0; i < odn_sclk_table->num_of_pl; i++)

				size += sprintf(buf + size, "%d: %10uMHz %10umV\n",

				size += sysfs_emit_at(buf, size, "%d: %10uMHz %10umV\n",

					i, odn_sclk_table->entries[i].clock/100,

					odn_sclk_table->entries[i].vddc);

		}

		break;

	case OD_MCLK:

		if (hwmgr->od_enabled) {

			size = sprintf(buf, "%s:\n", "OD_MCLK");

			size = sysfs_emit(buf, "%s:\n", "OD_MCLK");

			for (i = 0; i < odn_mclk_table->num_of_pl; i++)

				size += sprintf(buf + size, "%d: %10uMHz %10umV\n",

				size += sysfs_emit_at(buf, size, "%d: %10uMHz %10umV\n",

					i, odn_mclk_table->entries[i].clock/100,

					odn_mclk_table->entries[i].vddc);

		}

		break;

	case OD_RANGE:

		if (hwmgr->od_enabled) {

			size = sprintf(buf, "%s:\n", "OD_RANGE");

			size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",

			size = sysfs_emit(buf, "%s:\n", "OD_RANGE");

			size += sysfs_emit_at(buf, size, "SCLK: %7uMHz %10uMHz\n",

				data->golden_dpm_table.sclk_table.dpm_levels[0].value/100,

				hwmgr->platform_descriptor.overdriveLimit.engineClock/100);

			size += sprintf(buf + size, "MCLK: %7uMHz %10uMHz\n",

			size += sysfs_emit_at(buf, size, "MCLK: %7uMHz %10uMHz\n",

				data->golden_dpm_table.mclk_table.dpm_levels[0].value/100,

				hwmgr->platform_descriptor.overdriveLimit.memoryClock/100);

			size += sprintf(buf + size, "VDDC: %7umV %11umV\n",

			size += sysfs_emit_at(buf, size, "VDDC: %7umV %11umV\n",

				data->odn_dpm_table.min_vddc,

				data->odn_dpm_table.max_vddc);

		}
@@ -5503,7 +5503,7 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) 
	if (!buf)

		return -EINVAL;



	size += sprintf(buf + size, "%s %16s %16s %16s %16s %16s %16s %16s\n",

	size += sysfs_emit_at(buf, size, "%s %16s %16s %16s %16s %16s %16s %16s\n",

			title[0], title[1], title[2], title[3],

			title[4], title[5], title[6], title[7]);
@@ -5511,7 +5511,7 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) 


	for (i = 0; i < len; i++) {

		if (i == hwmgr->power_profile_mode) {

			size += sprintf(buf + size, "%3d %14s %s: %8d %16d %16d %16d %16d %16d\n",

			size += sysfs_emit_at(buf, size, "%3d %14s %s: %8d %16d %16d %16d %16d %16d\n",

			i, profile_name[i], "*",

			data->current_profile_setting.sclk_up_hyst,

			data->current_profile_setting.sclk_down_hyst,
@@ -5522,21 +5522,21 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) 
			continue;

		}

		if (smu7_profiling[i].bupdate_sclk)

			size += sprintf(buf + size, "%3d %16s: %8d %16d %16d ",

			size += sysfs_emit_at(buf, size, "%3d %16s: %8d %16d %16d ",

			i, profile_name[i], smu7_profiling[i].sclk_up_hyst,

			smu7_profiling[i].sclk_down_hyst,

			smu7_profiling[i].sclk_activity);

		else

			size += sprintf(buf + size, "%3d %16s: %8s %16s %16s ",

			size += sysfs_emit_at(buf, size, "%3d %16s: %8s %16s %16s ",

			i, profile_name[i], "-", "-", "-");



		if (smu7_profiling[i].bupdate_mclk)

			size += sprintf(buf + size, "%16d %16d %16d\n",

			size += sysfs_emit_at(buf, size, "%16d %16d %16d\n",

			smu7_profiling[i].mclk_up_hyst,

			smu7_profiling[i].mclk_down_hyst,

			smu7_profiling[i].mclk_activity);

		else

			size += sprintf(buf + size, "%16s %16s %16s\n",

			size += sysfs_emit_at(buf, size, "%16s %16s %16s\n",

			"-", "-", "-");

	}

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

+4 −3
Original line number Diff line number Diff line
@@ -1547,7 +1547,8 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr, 
	struct smu8_hwmgr *data = hwmgr->backend;

	struct phm_clock_voltage_dependency_table *sclk_table =

			hwmgr->dyn_state.vddc_dependency_on_sclk;

	int i, now, size = 0;

	uint32_t i, now;

	int size = 0;



	switch (type) {

	case PP_SCLK:
@@ -1558,7 +1559,7 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr, 
				CURR_SCLK_INDEX);



		for (i = 0; i < sclk_table->count; i++)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

			size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",

					i, sclk_table->entries[i].clk / 100,

					(i == now) ? "*" : "");

		break;
@@ -1570,7 +1571,7 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr, 
				CURR_MCLK_INDEX);



		for (i = SMU8_NUM_NBPMEMORYCLOCK; i > 0; i--)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

			size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",

					SMU8_NUM_NBPMEMORYCLOCK-i, data->sys_info.nbp_memory_clock[i-1] / 100,

					(SMU8_NUM_NBPMEMORYCLOCK-i == now) ? "*" : "");

		break;