Loading drivers/gpu/drm/radeon/radeon.h +2 −5 Original line number Diff line number Diff line Loading @@ -220,11 +220,6 @@ int radeon_atom_get_clock_dividers(struct radeon_device *rdev, struct atom_clock_dividers *dividers); void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type); void rs690_pm_info(struct radeon_device *rdev); extern int rv6xx_get_temp(struct radeon_device *rdev); extern int rv770_get_temp(struct radeon_device *rdev); extern int evergreen_get_temp(struct radeon_device *rdev); extern int sumo_get_temp(struct radeon_device *rdev); extern int si_get_temp(struct radeon_device *rdev); extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, unsigned *bankh, unsigned *mtaspect, unsigned *tile_split); Loading Loading @@ -1395,6 +1390,7 @@ struct radeon_asic { void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); void (*set_clock_gating)(struct radeon_device *rdev, int enable); int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk); int (*get_temperature)(struct radeon_device *rdev); } pm; /* pageflipping */ struct { Loading Loading @@ -2067,6 +2063,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) #define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) Loading drivers/gpu/drm/radeon/radeon_asic.c +8 −0 Original line number Diff line number Diff line Loading @@ -1052,6 +1052,7 @@ static struct radeon_asic r600_asic = { .get_pcie_lanes = &r600_get_pcie_lanes, .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .get_temperature = &rv6xx_get_temp, }, .pflip = { .pre_page_flip = &rs600_pre_page_flip, Loading Loading @@ -1146,6 +1147,7 @@ static struct radeon_asic rs780_asic = { .get_pcie_lanes = NULL, .set_pcie_lanes = NULL, .set_clock_gating = NULL, .get_temperature = &rv6xx_get_temp, }, .pflip = { .pre_page_flip = &rs600_pre_page_flip, Loading Loading @@ -1253,6 +1255,7 @@ static struct radeon_asic rv770_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = &radeon_atom_set_clock_gating, .set_uvd_clocks = &rv770_set_uvd_clocks, .get_temperature = &rv770_get_temp, }, .pflip = { .pre_page_flip = &rs600_pre_page_flip, Loading Loading @@ -1360,6 +1363,7 @@ static struct radeon_asic evergreen_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &evergreen_set_uvd_clocks, .get_temperature = &evergreen_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -1467,6 +1471,7 @@ static struct radeon_asic sumo_asic = { .set_pcie_lanes = NULL, .set_clock_gating = NULL, .set_uvd_clocks = &sumo_set_uvd_clocks, .get_temperature = &sumo_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -1574,6 +1579,7 @@ static struct radeon_asic btc_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &evergreen_set_uvd_clocks, .get_temperature = &evergreen_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -1733,6 +1739,7 @@ static struct radeon_asic cayman_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &evergreen_set_uvd_clocks, .get_temperature = &evergreen_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -2047,6 +2054,7 @@ static struct radeon_asic si_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &si_set_uvd_clocks, .get_temperature = &si_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading drivers/gpu/drm/radeon/radeon_asic.h +5 −0 Original line number Diff line number Diff line Loading @@ -401,6 +401,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev, int r600_mc_wait_for_idle(struct radeon_device *rdev); u32 r600_get_xclk(struct radeon_device *rdev); uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); int rv6xx_get_temp(struct radeon_device *rdev); /* uvd */ int r600_uvd_init(struct radeon_device *rdev); Loading Loading @@ -434,6 +435,7 @@ int rv770_copy_dma(struct radeon_device *rdev, u32 rv770_get_xclk(struct radeon_device *rdev); int rv770_uvd_resume(struct radeon_device *rdev); int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); int rv770_get_temp(struct radeon_device *rdev); /* * evergreen Loading Loading @@ -488,6 +490,8 @@ int evergreen_copy_dma(struct radeon_device *rdev, struct radeon_fence **fence); void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); int evergreen_get_temp(struct radeon_device *rdev); int sumo_get_temp(struct radeon_device *rdev); /* * cayman Loading Loading @@ -558,6 +562,7 @@ void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) u32 si_get_xclk(struct radeon_device *rdev); uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); int si_get_temp(struct radeon_device *rdev); /* DCE8 - CIK */ void dce8_bandwidth_update(struct radeon_device *rdev); Loading drivers/gpu/drm/radeon/radeon_pm.c +4 −22 Original line number Diff line number Diff line Loading @@ -434,27 +434,10 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, struct radeon_device *rdev = ddev->dev_private; int temp; switch (rdev->pm.int_thermal_type) { case THERMAL_TYPE_RV6XX: temp = rv6xx_get_temp(rdev); break; case THERMAL_TYPE_RV770: temp = rv770_get_temp(rdev); break; case THERMAL_TYPE_EVERGREEN: case THERMAL_TYPE_NI: temp = evergreen_get_temp(rdev); break; case THERMAL_TYPE_SUMO: temp = sumo_get_temp(rdev); break; case THERMAL_TYPE_SI: temp = si_get_temp(rdev); break; default: if (rdev->asic->pm.get_temperature) temp = radeon_get_temperature(rdev); else temp = 0; break; } return snprintf(buf, PAGE_SIZE, "%d\n", temp); } Loading Loading @@ -492,8 +475,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) case THERMAL_TYPE_NI: case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SI: /* No support for TN yet */ if (rdev->family == CHIP_ARUBA) if (rdev->asic->pm.get_temperature == NULL) return err; rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); if (IS_ERR(rdev->pm.int_hwmon_dev)) { Loading Loading
drivers/gpu/drm/radeon/radeon.h +2 −5 Original line number Diff line number Diff line Loading @@ -220,11 +220,6 @@ int radeon_atom_get_clock_dividers(struct radeon_device *rdev, struct atom_clock_dividers *dividers); void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type); void rs690_pm_info(struct radeon_device *rdev); extern int rv6xx_get_temp(struct radeon_device *rdev); extern int rv770_get_temp(struct radeon_device *rdev); extern int evergreen_get_temp(struct radeon_device *rdev); extern int sumo_get_temp(struct radeon_device *rdev); extern int si_get_temp(struct radeon_device *rdev); extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, unsigned *bankh, unsigned *mtaspect, unsigned *tile_split); Loading Loading @@ -1395,6 +1390,7 @@ struct radeon_asic { void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); void (*set_clock_gating)(struct radeon_device *rdev, int enable); int (*set_uvd_clocks)(struct radeon_device *rdev, u32 vclk, u32 dclk); int (*get_temperature)(struct radeon_device *rdev); } pm; /* pageflipping */ struct { Loading Loading @@ -2067,6 +2063,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l)) #define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e)) #define radeon_set_uvd_clocks(rdev, v, d) (rdev)->asic->pm.set_uvd_clocks((rdev), (v), (d)) #define radeon_get_temperature(rdev) (rdev)->asic->pm.get_temperature((rdev)) #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s))) #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r))) #define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev)) Loading
drivers/gpu/drm/radeon/radeon_asic.c +8 −0 Original line number Diff line number Diff line Loading @@ -1052,6 +1052,7 @@ static struct radeon_asic r600_asic = { .get_pcie_lanes = &r600_get_pcie_lanes, .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .get_temperature = &rv6xx_get_temp, }, .pflip = { .pre_page_flip = &rs600_pre_page_flip, Loading Loading @@ -1146,6 +1147,7 @@ static struct radeon_asic rs780_asic = { .get_pcie_lanes = NULL, .set_pcie_lanes = NULL, .set_clock_gating = NULL, .get_temperature = &rv6xx_get_temp, }, .pflip = { .pre_page_flip = &rs600_pre_page_flip, Loading Loading @@ -1253,6 +1255,7 @@ static struct radeon_asic rv770_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = &radeon_atom_set_clock_gating, .set_uvd_clocks = &rv770_set_uvd_clocks, .get_temperature = &rv770_get_temp, }, .pflip = { .pre_page_flip = &rs600_pre_page_flip, Loading Loading @@ -1360,6 +1363,7 @@ static struct radeon_asic evergreen_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &evergreen_set_uvd_clocks, .get_temperature = &evergreen_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -1467,6 +1471,7 @@ static struct radeon_asic sumo_asic = { .set_pcie_lanes = NULL, .set_clock_gating = NULL, .set_uvd_clocks = &sumo_set_uvd_clocks, .get_temperature = &sumo_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -1574,6 +1579,7 @@ static struct radeon_asic btc_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &evergreen_set_uvd_clocks, .get_temperature = &evergreen_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -1733,6 +1739,7 @@ static struct radeon_asic cayman_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &evergreen_set_uvd_clocks, .get_temperature = &evergreen_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading Loading @@ -2047,6 +2054,7 @@ static struct radeon_asic si_asic = { .set_pcie_lanes = &r600_set_pcie_lanes, .set_clock_gating = NULL, .set_uvd_clocks = &si_set_uvd_clocks, .get_temperature = &si_get_temp, }, .pflip = { .pre_page_flip = &evergreen_pre_page_flip, Loading
drivers/gpu/drm/radeon/radeon_asic.h +5 −0 Original line number Diff line number Diff line Loading @@ -401,6 +401,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev, int r600_mc_wait_for_idle(struct radeon_device *rdev); u32 r600_get_xclk(struct radeon_device *rdev); uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); int rv6xx_get_temp(struct radeon_device *rdev); /* uvd */ int r600_uvd_init(struct radeon_device *rdev); Loading Loading @@ -434,6 +435,7 @@ int rv770_copy_dma(struct radeon_device *rdev, u32 rv770_get_xclk(struct radeon_device *rdev); int rv770_uvd_resume(struct radeon_device *rdev); int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); int rv770_get_temp(struct radeon_device *rdev); /* * evergreen Loading Loading @@ -488,6 +490,8 @@ int evergreen_copy_dma(struct radeon_device *rdev, struct radeon_fence **fence); void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); int evergreen_get_temp(struct radeon_device *rdev); int sumo_get_temp(struct radeon_device *rdev); /* * cayman Loading Loading @@ -558,6 +562,7 @@ void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) u32 si_get_xclk(struct radeon_device *rdev); uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); int si_get_temp(struct radeon_device *rdev); /* DCE8 - CIK */ void dce8_bandwidth_update(struct radeon_device *rdev); Loading
drivers/gpu/drm/radeon/radeon_pm.c +4 −22 Original line number Diff line number Diff line Loading @@ -434,27 +434,10 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, struct radeon_device *rdev = ddev->dev_private; int temp; switch (rdev->pm.int_thermal_type) { case THERMAL_TYPE_RV6XX: temp = rv6xx_get_temp(rdev); break; case THERMAL_TYPE_RV770: temp = rv770_get_temp(rdev); break; case THERMAL_TYPE_EVERGREEN: case THERMAL_TYPE_NI: temp = evergreen_get_temp(rdev); break; case THERMAL_TYPE_SUMO: temp = sumo_get_temp(rdev); break; case THERMAL_TYPE_SI: temp = si_get_temp(rdev); break; default: if (rdev->asic->pm.get_temperature) temp = radeon_get_temperature(rdev); else temp = 0; break; } return snprintf(buf, PAGE_SIZE, "%d\n", temp); } Loading Loading @@ -492,8 +475,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) case THERMAL_TYPE_NI: case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SI: /* No support for TN yet */ if (rdev->family == CHIP_ARUBA) if (rdev->asic->pm.get_temperature == NULL) return err; rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); if (IS_ERR(rdev->pm.int_hwmon_dev)) { Loading