Commit 6a780f51 authored by Alex Elder's avatar Alex Elder Committed by Jakub Kicinski
Browse files

net: ipa: fix inter-EE IRQ register definitions 



In gsi_irq_setup(), two registers are written with the intention of
disabling inter-EE channel and event IRQs.

But the wrong registers are used (and defined); the ones used are
read-only registers that indicate whether the interrupt condition is
present.

Define the mask registers instead of the status registers, and use
them to disable the inter-EE interrupt types.

Fixes: 46f748cc ("net: ipa: explicitly disallow inter-EE interrupts")
Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210505223636.232527-1-elder@linaro.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 9f3c3b42

drivers/net/ipa/gsi.c

+2 −2
Original line number Diff line number Diff line
@@ -211,8 +211,8 @@ static void gsi_irq_setup(struct gsi *gsi) 
	iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);



	/* The inter-EE registers are in the non-adjusted address range */

	iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);

	iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);

	iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_CH_IRQ_MSK_OFFSET);

	iowrite32(0, gsi->virt_raw + GSI_INTER_EE_SRC_EV_CH_IRQ_MSK_OFFSET);



	iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET);

}

drivers/net/ipa/gsi_reg.h

+9 −9
Original line number Diff line number Diff line
@@ -53,15 +53,15 @@ 
#define GSI_EE_REG_ADJUST			0x0000d000	/* IPA v4.5+ */



/* The two inter-EE IRQ register offsets are relative to gsi->virt_raw */

#define GSI_INTER_EE_SRC_CH_IRQ_OFFSET \

			GSI_INTER_EE_N_SRC_CH_IRQ_OFFSET(GSI_EE_AP)

#define GSI_INTER_EE_N_SRC_CH_IRQ_OFFSET(ee) \

			(0x0000c018 + 0x1000 * (ee))



#define GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET \

			GSI_INTER_EE_N_SRC_EV_CH_IRQ_OFFSET(GSI_EE_AP)

#define GSI_INTER_EE_N_SRC_EV_CH_IRQ_OFFSET(ee) \

			(0x0000c01c + 0x1000 * (ee))

#define GSI_INTER_EE_SRC_CH_IRQ_MSK_OFFSET \

			GSI_INTER_EE_N_SRC_CH_IRQ_MSK_OFFSET(GSI_EE_AP)

#define GSI_INTER_EE_N_SRC_CH_IRQ_MSK_OFFSET(ee) \

			(0x0000c020 + 0x1000 * (ee))



#define GSI_INTER_EE_SRC_EV_CH_IRQ_MSK_OFFSET \

			GSI_INTER_EE_N_SRC_EV_CH_IRQ_MSK_OFFSET(GSI_EE_AP)

#define GSI_INTER_EE_N_SRC_EV_CH_IRQ_MSK_OFFSET(ee) \

			(0x0000c024 + 0x1000 * (ee))



/* All other register offsets are relative to gsi->virt */